Papers by Author: R.D. Vispute

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Authors: Lin Zhu, Mayura Shanbhag, T. Paul Chow, Kenneth A. Jones, Matthew H. Ervin, Pankaj B. Shah, Michael A. Derenge, R.D. Vispute, T. Venkatesan, Anant K. Agarwal
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Authors: Kenneth A. Jones, T.S. Zheleva, Matthew H. Ervin, Pankaj B. Shah, Michael A. Derenge, G.J. Gerardi, Jaime A. Freitas, R.D. Vispute
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Authors: Kenneth A. Jones, K. Xie, D.W. Eckart, M.C. Wood, V. Talyansky, R.D. Vispute, T. Venkatesan, K. Wongchotigul, Michael G. Spencer
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Authors: Lin Zhu, Peter A. Losee, T. Paul Chow, Kenneth A. Jones, Charles Scozzie, Matthew H. Ervin, Pankaj B. Shah, Michael A. Derenge, R.D. Vispute, T. Venkatesan, Anant K. Agarwal
Abstract: 4H-SiC PiN rectifiers with implanted anode and single-zone JTE were fabricated using AlN capped anneal. The surface damage during the high temperature activation anneal is significantly reduced by using AlN capped anneal. The forward drop of the PiN rectifiers at 100A/cm2 is 3.0V while the leakage current is less than 10-7A/cm2 up to 90% breakdown voltage at room temperature. With 6μm thick and 2×1016cm-3 doped drift layer, the PiN rectifiers can achieve near ideal breakdown voltage up to 1050V. Hole impact ionization rate was extracted and compared with previously reported results.
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Authors: Kenneth A. Jones, Pankaj B. Shah, Michael A. Derenge, Matthew H. Ervin, G.J. Gerardi, Jaime A. Freitas, G.C.B. Braga, R.D. Vispute, R.P. Sharma, O.W. Holland
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Authors: Kenneth A. Jones, M.C. Wood, T.S. Zheleva, K.W. Kirchner, Michael A. Derenge, A. Bolonikov, Tangali S. Sudarshan, R.D. Vispute, Shiva S. Hullavarad, S. Dhar
Abstract: 4H-SiC samples implanted with 1020 Al were annealed at various temperatures with a BN/AlN or graphite cap, and there morphological, structural, and electrical properties are compared. No blow holes were observed in either cap. Some Si out-diffuses through the graphite cap which results in a rougher surface and a structurally modified region near the surface. The BN/AlN cap annealed at 1800°C cannot be readily removed, whereas the graphite cap can be removed easily after any annealing temperature. The sheet resistances for both types of samples were about the same.
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Authors: Aivars J. Lelis, Charles Scozzie, F. Barry McLean, Bruce Geil, R.D. Vispute, T. Venkatesan
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Authors: Kenneth A. Jones, T.S. Zheleva, R.D. Vispute, Shiva S. Hullavarad, M. Ervin, S. Dhar
Abstract: At sufficiently high temperatures PLD deposited TaC films can be grown epitaxially on 4H-SiC (0001) substrates; at lower temperatures the films recrystallize and ball up forming a large number of pinholes. The growth temperature for epitaxy was found to be 1000°C, and it was facilitated by the epitaxial growth of a thin (2 nm) transition layer of hexagonal Ta2C. High temperature annealing produced changes in the surface morphology, caused grain growth, and created pin holes through a recrystallization process in the films deposited at the lower temperatures, while the films deposited at the higher temperatures remained virtually unchanged. Using TEM it is shown that the (0001) basal planes of the hexagonal 4H-SiC and Ta2C phases are aligned, and they were also parallel to the (111) plane in the cubic TaC with the [101] cubic direction being parallel to the hexagonal [2110] hexagonal direction. The Ta2C interlayer most likely is formed because its lattice parameter in the basel plane (3.103 Ǻ) is intermediate between that of the 4H-SiC (3.08 Ǻ) and the TaC (3.150 Ǻ). Given that Al.5Ga.5N is lattice matched to TaC, it could be an excellent substrate for the growth of GaN/AlGaN heterostructures.
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Authors: Stephen E. Saddow, G.E. Carter, Bruce Geil, T.S. Zheleva, Galyna Melnychuck, M.E. Okhuysen, Michael S. Mazzola, R.D. Vispute, Michael A. Derenge, Matthew H. Ervin, Kenneth A. Jones
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Authors: Jaime A. Freitas, Kenneth A. Jones, Michael A. Derenge, R.D. Vispute, Shiva S. Hullavarad
Abstract: 4H-SiC samples implanted at 600°C with 1020 cm-3 of B or B and C to a depth of ~0.5 μm, capped with (BN/AlN), and annealed at temperatures ranging from 1400°C – 1700°C were studied using variable temperature cathodoluminescence. New emission lines, which may be associated with stacking faults, were observed in the samples co-implanted with B and C, but not in the samples implanted only with B. For both the B and B and C co-implanted samples, the intensity of the line near 3.0 eV decreases with increasing annealing temperature, TA, and this line is not observed after annealing at 1700°C. The D1 defect related emission lines are observed in the luminescence spectra of all samples and their relative intensities seem to vary with the implantation-annealing schedule and excitation conditions.
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