Defect and Diffusion Forum
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Defect and Diffusion Forum Vol. 452
DOI:
https://doi.org/10.4028/v-dtMOu1
DOI link
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Paper Title Page
Abstract: Results from optical defect inspections, and X-ray topography, on wafers from entire 4H-SiC ingots provide a clear visualization on the positional dependance of bulk inclusions in ingots with respect to growth stages, looking to both density and size. It is also clear while studying the superpositioning of Laue–Bragg interference densities that the different categories of said defectivity generate new crystallographic defects, dislocations. These in turn lead to significant reductions in usability of wafers, and the lack of tracing such defects, cause an increased difficulty to predict the final device yield, as is displayed by growing epitaxial layers on materials heavily affected by bulk inclusions.
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Abstract: Surface pits in silicon carbide (SiC) epitaxial layers have a significant impact on various types of SiC devices, potentially causing electric field concentration and degrading device performance. The formation mechanism of surface pits remains unclear. In this work, the mechanism was investigated through the molten KOH etching experiments, and we confirmed that surface pits originate from dislocation defects in the substrate, particularly TSDs. The dislocations negatively impacted the step-flow growth of epitaxy, leading to pit formation. Further investigations into the effects of growth temperature, C/Si ratio, and epitaxial-layer thickness on pit formation revealed that low temperatures and silicon-rich conditions could effectively suppress pit formation. Both the density and size of surface pits increased significantly with the increase in epitaxial layer thickness. Therefore, this work proposes a model for the formation mechanism of surface pits, where the competition between step-flow growth and spiral growth is a key factor in controlling the size of surface pits.
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Abstract: The quality of the epitaxial layer plays an important role in the performance of modern power electronic devices. Minority carrier lifetime is known to be sensitive to defects like dislocations, stacking faults, and points defects. Therefore, in this work lifetime measurements by microwave detected photoconductivity decay are used to evaluate the quality of the epitaxial layer on various 4H-SiC substrates from different vendors. The stability of the measurement technique is shown by a daily release measurement. This allows for a reliable analysis of almost 300 typical 1,200 V epilayer stacks. It has been shown that the effective lifetime of these samples can be separated into two different ranges. The lifetime values of about 120 ns fit to theoretical calculations. The cause for the increased lifetime of about 250 ns in the second range has yet to be determined in further research. Furthermore, the lifetime maps were used to locate defects in the surface near regions.
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DLTS Analysis of Deep Levels in 4H-SiC Schottky Barrier Diode under Different Measurement Parameters
Abstract: This paper investigates the effect of DLTS measurement parameters on characterizing deep level defects in 4H-SiC Schottky barrier diode (SBD). By adjusting parameters such as the time window (tW), pulse time (tP), reverse voltage (UR), and pulse voltage (UP), the underlying mechanisms influencing defect peak positions, signal amplitudes, and peak broadening are analyzed. Experimental results reveal three deep level defects identified in 4H-SiC SBD: majority carrier traps T1 (EC - 0.66 eV) and T2 (EC - 1.0 eV), along with minority carrier trap T3 (EV + 1.1 eV). Parameter settings not only influence defect characterization sensitivity and concentration calculations but also reveal the dynamics of carrier capture and emission. Through the thorough analysis of the DLTS signal and behavior under different DLTS measurement conditions, the electronic properties and concentration profiles of deep level defects in 4H-SiC epitaxial layers are determined.
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Abstract: 8-inch 4H-SiC single crystals were grown under different temperature fields and nitrogen doping conditions by physical vapor transport method. The distributions of basal plane dislocation (BPD) in 4H-SiC single crystals under different growth conditions were studied by molten KOH etching and X-ray Topography (XRT). The results indicate that the BPDs in the crystals grown under convex temperature field are distributed at the edge. In comparison, the BPD distributions in crystals grown under a concave temperature field are relatively closer to the center. Furthermore, the BPDs distributions in nitrogen-doped crystals exhibit quadratic symmetry caused by prismatic slip. In contrast, no prismatic slip-induced slip bands were observed in the undoped crystals, and the BPD distributions in the undoped crystals are consistent with the shear stress distribution caused by basal plane slip.
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Abstract: Local electrical properties of a 4H-Silicon Carbide SiC(0001) 4°off macrostepped surface, obtained after liquid Si melting in a SiC/Si/SiC sandwich configuration, are investigated by Atomic Force Microscopy (AFM) in both DC and RF modes. On the same sample, macrosteps that are wide enough for allowing spatial resolution of the signal from terraces and step risers, but also some unreacted areas with standard flat surface (without macrosteps) are characterized. Scanning Spreading Resistance (SSRM, DC mode) reveals homogeneous conductivity on the wide terraces of the 4H-SiC(0001) macrosteps. On unreacted areas, which contain many step risers, the resistance is found higher than on the wide terrasses but it is also noisier. In addition, the AFM-RF scanning Microwave Impedance Microscopy (sMIM) mapping confirms the previous results by revealing lower conductivity on the unreacted areas than on the terraces of the macrosteps. Based on these results, some points defects located at the step risers which contribute negatively to the electrical properties of 4H-SiC(0001) surface are identified and electrically characterized.
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Abstract: A new design approach on 4H-SiC material is ongoing to improve the electrical performance of devices. As seen in silicon devices, multi-epitaxial growth enhances performance by reducing on-resistance (Ron). However, devices built on SiC face several challenges due to the very low dopant diffusion (e.g. phosphorus and aluminum) and defect evolution during the epitaxial growth. Monitoring defects like prismatic faults, stacking faults, partial dislocations, and micropipes, especially after regrowth, is essential to assess their impact on device performance. Defects with high killer ratio must be closely tracked to understand evolution thereof. In this work, we will show a method for early-stage process characterization and defect root-cause identification through sensitive inspections, effective reviews, and accurate defect classification to detect critical defects in 4H-SiC material when more than one epitaxial step is considered.
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Abstract: In this paper, the temperature dependence of charge carrier lifetimes in n-type 4H-SiC epitaxial layers is studied in a temperature range of 300-500 K. It is assumed that shallow (B) and deep (D) boron-related defects are the dominating lifetime killers in as-grown epitaxial layers. The thermodynamic behavior of these two types of defects is obtained from DLTS measurements, and implemented in the Shockley-Read-Hall (SRH) model to calculate lifetimes, using Gibbs free energies to describe the accurate temperature dependence for capture and emission processes of the defects. Calculation results show that the lifetimes controlled by shallow boron defects increase with increasing temperature, while D-defects give the opposite temperature dependence. The theoretical results are also compared to measured data from 10 kV 4H-SiC PiN-structures, showing that the temperature dependence of the effective lifetime can be changed by proton implantations, which gives rise to additional Z1/2 defects that have similar temperature effects on lifetimes as D-related defects.
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Abstract: Micropipe defects in silicon carbide (SiC) materials significantly degrade the performance of SiC materials and their applications in semiconductor devices. In this study, systematic methods were utilized to characterize different micropipes in 4H-SiC. X-ray topography was employed to investigate the morphology of micropipe defects in SiC substrates and quantify their associated lattice distortion fields. Meanwhile, white light interferometry mode microscopy and inner stain were utilized to thoroughly characterize their properties. It was found that micropipes were accompanied with different size and distortion areas in SiC substrate. This work will be served as a refined characterization of micropipes and give guidance for device application for SiC substrate.
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