Investigation of Overcurrent Turn-Off Robustness of 1200 V SiC MOSFETs

Madhu Lakshman Mysore; Darshan Koorana Prasanna Kumar; Chao Hao Wang; Josef Lutz; Thomas Basler

doi:10.4028/p-O0YawH

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HomeKey Engineering MaterialsKey Engineering Materials Vol. 1024Investigation of Overcurrent Turn-Off Robustness...

Investigation of Overcurrent Turn-Off Robustness of 1200 V SiC MOSFETs

Abstract:

The aim of this study is to investigate the overcurrent turn-off robustness limit of SiC MOSFETs from three different manufacturers with three different cell technologies up to very high turn-off currents to determine a possible destruction limit and failure type. The influence of the negative gate-source voltage (V_GS,off) was studied because of the high drain-source overvoltage in connection with the decreased V_GS,off, which is the most critical point for the gate oxide field stress for the different cell technologies. All measurements were performed at a positive gate-source voltage (V_GS,on) above the specified datasheet values to reach high currents without channel pinch-off. In addition, the influence of temperature on the overcurrent robustness was studied. Finally, TCAD simulations were performed to determine the reason for the failure mechanism under the overcurrent turn-off conditions. All the manufacturer devices can withstand several times higher gate-source voltages under overcurrent conditions than the values recommended in the datasheet.

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Periodical:

Key Engineering Materials (Volume 1024)

Pages:

29-37

DOI:

https://doi.org/10.4028/p-O0YawH

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Cite this paper

Online since:

September 2025

Authors:

Madhu Lakshman Mysore*, Darshan Koorana Prasanna Kumar, Chao Hao Wang, Josef Lutz, Thomas Basler

Keywords:

Electric Field, Gate Oxide, Gate-Leakage, Overcurrent Turn-Off, Robustness, TCAD

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Creative Commons CC BY 4.0

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* - Corresponding Author

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