Preface
Study of Interface Traps and Scattering Mechanisms in the 4H-SiC MOS Channel Using Gated Hall Measurements
p.1
p.1
Gate Leakage Imaging of Silicon Carbide Power MOSFETs under Negative-Bias Gate Stress
p.7
p.7
Impact of Device Structure on the Performance of Ion-Implanted SiC Phototransistors
p.13
p.13
1.2 kV SiC MOSFET with Reduced Dynamic Losses Enabled by SiN Gate Dielectric
p.19
p.19
Investigation of SiC MOSFETs Gate Capacitance Peak with Biased Drain and Its Relation with Transconductance
p.29
p.29
Insight into Bias-Temperature Instability of SiC MOSFETs Using Charge Pumping and Triple-Sense Threshold Measurements
p.35
p.35
Experimental Analysis of 4H-SiC CMOS NOT Logic Gate Down to 100K
p.43
p.43
Characterization of 4H-SiC Lateral MOSFETs up to 773 K
p.49
p.49
Preface
Abstract:
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