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Fowler-Nordheim Current at Negative Gate Bias in SiC MOSFETs
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Body Diode Reliability and Reverse Recovery Characteristics of Short Tapered SJ-MOSFET Fabricated by MeV Al Ion Implantation
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Influence of Cell Structure and Topology on Coss of 4H-SiC MOSFET
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Influence of Cell Structure and Topology on Coss of 4H-SiC MOSFET

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Abstract:

This study demonstrates that the output capacitance (Coss) of a 4H-SiC MOSFET is proportional to the length of JFET (LJFET) at a low Vds, since under this condition, the gate-to-drain capacitance (Cgd) may account for nearly half of Coss. Furthermore, when Vds is low, the Coss of MOSFETs with square and hexagonal cell topologies is approximately 20% and 25% higher than that of MOSFETs with the strip cell topology, respectively, due to larger JFET areas. However, when Vds is higher, the Coss of MOSFETs with square and hexagonal cell topologies is lower because of the lower drain-to-source capacitance (Cds) resulting from smaller Pwell areas. The split-gate MOSFET can reduce Cgd, but the smaller poly-gate area decreases the depletion capability, resulting in a higher Cds. As LJFET of the MOSFET decreases, Cgd becomes lower, which may shorten the switching time, but due to the increased length of Pwell (LPW), the reverse recovery current (Irr) increases. This study proposes partially increasing the gate oxide thickness. Although this may slightly increase Cds, the shorter switching time results in a 5% reduction in the turn-on switching loss (Eon).

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Periodical:

Key Engineering Materials (Volume 1057)

Pages:

125-130

DOI:

https://doi.org/10.4028/p-m0gjDq

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Cite this paper

Online since:

May 2026

Authors:

Ruei Ci Wu, Kung Yen Lee, Pei Chi Liao*, Pei Chun Liao, Jui Chi Chu

Keywords:

Abrupt Drop Phenomenon, Cell Topology, Output Capacitance (Coss), Split-Gate MOSFET, Switching Losses

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* - Corresponding Author

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