Materials Science Forum Vol. 1062

Abstract: 6.5 kV SiC PiN diode with JTE and p+ rings termination was fabricated and characterized. The static and dynamic performance of SiC PiN diode were compared with that of SiC JBS diode and silicon diode, while switched in combination with a silicon IGBT. SiC PiN provides clear advantage while operating at higher current densities (above 100 A/cm²) and had lower leakage current. When switched together with a silicon IGBT, they contribute to losses similar to that of a SiC JBS diode.

Abstract: This paper demonstrates the ability of 3CSiC microcantilevers (μCs) to monitor binary gas mixture without sensitive coating. Here, 3CSiC is chosen in particular, as the newly designed sensor will be placed in a radioactive environment. The change in gas concentration is identified using relative shifts in the cantilever’s mechanical resonance frequency (∆f_r). The presented microcantilevers work on electromagnetic actuation and inductive detection. In this paper, the fabrication process, optical characterization results using laser Doppler vibrometry and test results under a gas mixture environment are demonstrated. The presented limit of detection shows the ability of 3CSiCμCs to detect less than 1% of hydrogen in nitrogen, which makes them suitable for the targeted application.

Abstract: This work presents the design methodology and performance of a compact edge termination structure aiming 10kV+ rated Silicon Carbide (SiC) devices. Standard Floating Field Rings (FFRs) for such high voltage rating SiC devices are not favored because they are inefficient in terms of the achievable breakdown voltage as a percentage of the 1D maximum, consume large chip area, require high implantation energies and small gaps between rings which can violate fabrication limits. We show that the implantation of Aluminium at the bottom of carefully positioned trenches can be analogous to deep Aluminium implantation in terms of performance, thus annulling the need for small gaps between rings and MeV ion implantation. We optimize the distribution of trenches by placing them in multiple zones of different expansion coefficient. The proposed multi expansion ratio Trench FFR termination was utilized to terminate the active area of a 10kV rated Punch Through n-IGBT having 0.8 μm p-body and 100 μm, 3×10¹⁴ cm^-3 drift region. We found the 0.6–0.8 µm to be the most optimum trench depth, achieving over 10 kV within less than 500 μm of termination length.

Abstract: Current electronics technology increasingly demands higher integration, flexibility, higher efficiency, and performance aspects such as compatibility with higher temperature operation of the semiconductor devices, which may find limitations when silicon is used. The superior intrinsic properties of SiC, eventually combined with the ability of growing monolithically epitaxial, high quality graphene on a SiC wafer (1), makes it a reliable alternative for some electronic applications, such as field effect transistors (FET), radio frequency (RF) power amplifiers, integrated circuits (IC), or sensors. In this work, we describe the fabrication and preliminary electrical characterizations of epitaxial graphene (EG) on a SiC substrate FET devices based on an alternative back gate architecture. We propose a new approach in which the FET device is built on a 4◦ off-axis cut, N+ doped 4H-SiC substrate (the back gate) with, on top of, it a 1μm semi-insulating homoepitaxial layer of SiC compensated with vanadium (the dielectric layer). EG will be used as FET conduction channel. Using this V-compensated dielectric layer is aimed to minimize effects on the FET characteristics such as from defects in the SiC crystal, especially below the FET active areas, which would have occurred when using ion implantation to create a buried gate. The EG film was grown by the high temperature Si sublimation method under an Ar ambient. Raman spectroscopy, Atomic Force Microscopy (AFM) and Scanning Electron Microscopy (SEM) were applied in the structural characterization of epigraphene. The lack of D-peak in Raman spectra, together with SEM and AFM images, indicate that high quality monolayer to few layer epitaxial graphene fully covering the SiC surface is deposited. The electrical characteristics of the EG channel-devices and the functionality of the bottom gate were examined with 2-probe and 4-probe method. The electrical properties of the FET devices were also investigated with 3 terminal configuration.

Abstract: A SiCNWFET device serving as a biosensor was designed and simulated using Silvaco ATLAS device simulation software. The performance of the designed device in charges sensing was investigated. The device shows the ability to recognize different interface charge values ranging from-1.10E11 to-5.10E12 cm^-2 applied on the surface of the silicon carbide nanowire channel to simulate target charge biomolecules that bound to the biosensor. A significant change in the output current is observed due to the presence of different values of fixed interface charge densities. An optimum, according to the TCAD simulation, the 4H-SiC epitaxial structure has been grown. The designed device was fully fabricated on this structure and it exhibited acceptable electrical characteristics.

Abstract: An optimized termination extension tutorial is reported for a small area (≈ 1mm² ) 4H-SiC NPN BJT. The extension system is based on a parametric JTE with isolation rings. Additional aspects such as (1) MESA angle, (2) relieving electric field on the base-drift junction, and (3) blocking the electric field from reaching border structure are investigated. A breakdown voltage greater than 10 kV is recorded, when drift region is n-doped to 8x10¹⁴ cm-3.

Abstract: Today, to respond to the increase of development of accurate, precise and relevant experiments in nuclear research reactors and tokamaks with their severe and intense operating conditions, there is a major need of innovative sensors that can accurately measure key parameters such as neutron and photon fluxes or nuclear heating rates. Thus, innovation in the field of nuclear instrumentation and measurements is a privileged research topic. It is crucial to develop optimized devices for accurate on-line in-core measurements, and scientific/technological requirements for various applications such as ageing of materials, safety applications, beam monitoring or nuclear physics. Nowadays, more and more semiconductors are used as sensor materials in nuclear instrumentation to measure various kinds of nuclear radiations. Silicon Carbide (SiC) is among them. In fact, SiC detectors could be used for the on-line measurement of key quantities such as neutron (thermal and fast) and photon fluxes. One main challenge is to enlarge the measurement range of this detector type. The work presented in this paper deals with this aim. Firstly, an introduction dedicated to the use of SiC versus other wide bandgap semiconductors and the characteristics of the studied sensor is shown. Secondly, this paper presents 3D numerical results obtained with a parametrical thermal study of the SiC detector using COMSOL Multiphysics code for a nuclear heating range corresponding to TRIGA nuclear research reactor conditions (integral neutron flux ~2.0 x10¹³ n·cm^‑2·s^-1 leading to a nuclear heating rate of 0.25 W·g^-1 in Tungsten). The main objective is to adapt and optimize the design and the housing of the detector by determining its temperature field for different configurations. The influence of various parameters is presented such as that of the housing material nature, the gas nature around the diode, the gas-gap height and the housing thickness.

Abstract: This work presents for the first time a comparative numerical study on the performance of planar 3.3 kV SiC MOSFETs during clamped and unclamped inductive switching for various cell layouts and pitches. It is demonstrated that despite its larger on-state losses, the atomic lattice layout (ALL) incurs smaller switching losses than the stripe and the circular designs for all examined cell pitches. Conversely, while the ALL does turn off earlier than the other layouts during UIS, the decrease in the peak lattice temperature that it brings is predicted to be marginal if just a single unit cell is considered.

Abstract: In this manuscript, the short circuit (SC) capability of 1.2 kV vertical double diffused SiC MOSFET with different layout topologies is investigated. 3D finite element electro-thermal simulations have been carried out in order to assess the performance of five different cell topologies. It has been found that while the maximum drain current density observed during a SC event agrees well with the specific on-state resistance behaviour, the maximum temperature evolution in the unit cell follows the opposite trend. This behaviour can be explained by the relatively poor spreading of the carriers in the JFET region (of the ALL) at small cell pitches (~ 8um), which can lead to the formation of a filament with a high current density and heat generation.

Abstract: Compactness, efficiency, and light weight are the key topics in the design of power conversion systems for transportation applications. This demand is achievable by using wide band gap devices such as SiC devices, characterized by the high switching speed and low on-resistance. However, this trend imposes new challenges and the effect of parasitic elements of power package during switching transient becomes significant. Hence, new packaging solutions should be investigated for addressing this concern. This paper presents a new multichip power module architecture, where its design considering capacitive and inductive stray elements is carried out. Using Ansys Q3D Extractor, electromagnetic simulations are achieved to extract the inductive and capacitive parasitic element of one leg of a three-phase inverter.