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Effect of Varying N+ Source Implantation Depth on the Electrical Characteristics of 1.2 kV 4H-SiC MOSFETs
Abstract:
The heavily doped N+ source region in 4H-SiC MOSFETs is a critical design parameter, as its depth and the profile strongly influence contact resistivity and conduction efficiency. This work investigates the impact of varying N+ implantation depth on the electrical performances of 1.2 kV MOSFETs in both Nominal (linear cell) and Hexagonal (HEXFET) architectures. By varying implantation energy at a fixed dose, three junction depths were obtained: 0.22 µm (shallow), 0.24 µm (moderate), and 0.27 µm (deep). Transfer Length Method (TLM) measurements revealed a significant reduction in source contact resistivity with increasing depth, from 3.91×10⁻5 Ω·cm² (shallow) to 1.22×10⁻6 Ω·cm² (deep). For Nominal MOSFET design, electrical measurements confirmed a corresponding decrease in specific on-resistance (Ron,sp), from 3.05 to 2.89 mΩ·cm². However, deeper implants introduced greater lateral straggle, shortening the effective channel length and reducing the threshold voltage (Vth) from 2.25 V to 1.96 V. The channel barrier potential lowering associated with lateral straggle increased leakage current in the blocking mode, resulting in reduced breakdown voltage (BV). For Nominal MOSFETs, BV decreased from 1610 V in the shallow split to 1470 V in the deep split, while HEXFETs exhibited sharper BV degradation due to their higher channel density. To address this limitation, optimized JFET doping was introduced, restoring the BV of the deep split to 1560 V in the Nominal architecture. These results demonstrate that although increased N+ depth improves conduction by lowering contact resistance, careful co-optimization with P-well and JFET design is necessary to suppress high leakage current during blocking mode.
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81-88
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Online since:
May 2026
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