Impact of ALD Oxidant and Deposition Temperature on Electrical Characteristics of Al₂O₃/SiO₂/SiC MOS-Capacitors

Abstract:

The increased demand for SiC power MOSFETs requires gate dielectrics with low defect densities and high reliability under high electric field and temperature conditions. In this work, we examine how oxidant chemistry and deposition temperature affect the electrical properties of Al₂O₃/SiO₂ bilayer dielectrics formed in n-type 4H-SiC MOS capacitors. These structures consist of a thin SiO₂ interfacial layer, over which Al₂O₃ is deposited via ALD using three different oxidants at a temperature of 150–350°C. C–V and temperature-dependent I–V (25–150°C) measurements show that the choice of oxidant influences the flat band voltage shift and leakage current density, with a process-dependent trade-off between optimizing each parameter. These findings highlight that precise control of oxidant chemistry during ALD is essential for balancing flat band voltage stability with leakage suppression, and that multilayer-specific conduction models are critical for accurately predicting high electric field leakage characteristics in advanced SiC gate stacks.

• Periodical: Materials Science Forum (Volume 1192)
• Pages: 21-28
• DOI: https://doi.org/10.4028/p-0EmUTi
• Online since: May 2026
• Authors: Harsha Vardhan Manchineni*, Andre Wachowiak, Thomas Mikolajick
• Keywords: 4H-SiC MOS Capacitor, Al₂O₃/SiO₂ Stacks, Atomic Layer Deposition (ALD), Bilayer Gate Dielectric, Conduction Mechanisms, Dielectric Strength, Flat Band Voltage Shift, High Electric Field Barrier Suppression, Interface Trap Density, MOSFET, Oxidant Chemistry

References

[1] T. Kimoto and J. A. Cooper, Fundamentals of Silicon Carbide Technology: Growth, Characterization, Devices, and Applications, 1st ed. Wiley, 2014.

DOI: 10.1002/9781118313534

[2] V. Veliadis, "Silicon Carbide Power Device Fabrication," in Power Semiconductor Technology in Pulsed Power Applications, S. B. Bayne and B. N. Pushpakaran, Eds., Cham: Springer Nature Switzerland, 2025, p.97–128.

DOI: 10.1007/978-3-031-80252-2_4

[3] H. Yoshioka and K. Hirata, "Characterization of SiO2/SiC interface states and channel mobility from MOSFET characteristics including variable-range hopping at cryogenic temperature," AIP Advances, vol. 8, no. 4, p.045217, Apr. 2018.

DOI: 10.1063/1.5027695

[4] V. V. Afanasev, M. Bassler, G. Pensl, and M. Schulz, "Intrinsic SiC/SiO2 Interface States," phys. stat. sol. (a), vol. 162, no. 1, p.321–337, Jul. 1997.

DOI: 10.1002/1521-396x(199707)162:1<321::aid-pssa321>3.0.co;2-f

[5] P. Fiorenza, F. Giannazzo, and F. Roccaforte, "Characterization of SiO2/4H-SiC Interfaces in 4H-SiC MOSFETs: A Review," Energies, vol. 12, no. 12, p.2310, Jun. 2019.

DOI: 10.3390/en12122310

[6] E. Schilirò et al., "Atomic Layer Deposition of Al2O3 Thin Films for Metal Insulator Semiconductor Applications on 4H-SiC," MSF, vol. 858, p.685–688, May 2016.

DOI: 10.4028/www.scientific.net/msf.858.685

[7] P. Fiorenza et al., "Evolution of Interface State Density and Near Interface Oxide Traps under Controlled Nitric Oxide Annealing in SiO2/SiC Lateral MOSFETs," MSF, vol. 1090, p.113–117, May 2023.

DOI: 10.4028/p-17738y

[8] L. Knoll et al., "Latest Advances in the Implementation and Characterization of High-K Gate Dielectrics in SiC Power MOSFETs," MSF, vol. 1062, p.383–388, May 2022.

DOI: 10.4028/p-kc5309

[9] Y.-X. Zeng et al., "MOS structure with as-deposited ALD Al2O3/4H-SiC heterostructure with high electrical performance: Investigation of the interfacial region," Journal of Vacuum Science & Technology A, vol. 42, no. 5, p.053207, Sep. 2024.

DOI: 10.1116/5.0202640

[10] T. Kubo, J. J. Freedsman, Y. Yoshida, and T. Egawa, "Effects of process temperature during atomic layer deposition using water and ozone as oxidants on current–voltage characteristics of Al2 O3 /AlGaN/GaN high-electron-mobility transistors on Si substrates," Jpn. J. Appl. Phys., vol. 54, no. 2, p.020301, Feb. 2015.

DOI: 10.7567/jjap.54.020301

[11] S. Krause, A. Mikhaylov, U. Schroeder, T. Mikolajick, and A. Wachowiak, "ZrO2 Based Multilayered Stacks with Al2O3, Y2O3 or La2O3 Interlayers for SiC Power Devices," ACS Appl. Mater. Interfaces, vol. 17, no. 19, p.28789–28798, May 2025.

DOI: 10.1021/acsami.5c00947

[12] E. Schilirò et al., "Al2O3 Layers Grown by Atomic Layer Deposition as Gate Insulator in 3C-SiC MOS Devices," Materials, vol. 16, no. 16, p.5638, Aug. 2023.

DOI: 10.3390/ma16165638

[13] P. Esakki and B. J. Kailath, "Extraction and Analysis of Gate Leakage Current Mechanism in Silicon Carbide (SiC) MIS Capacitors," IETE Journal of Research, vol. 68, no. 1, p.592–601, Jan. 2022.

DOI: 10.1080/03772063.2019.1617200

[14] Q. Huang et al., "High-Breakdown and Low-Leakage 4H-SiC MOS Capacitor Based on HfO2/SiO2 Stacked Gate Dielectric in Trench Structures," Nanomaterials, vol. 15, no. 5, p.343, Feb. 2025.

DOI: 10.3390/nano15050343

[15] A. Siddiqui, R. Y. Khosa, and M. Usman, "High- k dielectrics for 4H-silicon carbide: present status and future perspectives," J. Mater. Chem. C, vol. 9, no. 15, p.5055–5081, 2021.

DOI: 10.1039/d0tc05008c

[16] M. Avice, U. Grossner, I. Pintilie, B. G. Svensson, O. Nilsen, and H. Fjellvag, "Comparison of near-interface traps in Al2O3∕4H-SiC and Al2O3∕SiO2∕4H-SiC structures," Applied Physics Letters, vol. 89, no. 22, p.222103, Nov. 2006.

DOI: 10.1063/1.2387978

[17] C. Yang, Z. Gu, Z. Yin, F. Qin, and D. Wang, "Interfacial traps and mobile ions induced flatband voltage instability in 4H-SiC MOS capacitors under bias temperature stress," J. Phys. D: Appl. Phys., vol. 52, no. 40, p.405103, Oct. 2019.

DOI: 10.1088/1361-6463/ab2faf

[18] V. Van Cuong et al., "Study of interface-trap and near-interface-state distribution in a 4H-SiC MOS capacitor with the full-distributed circuit model," Jpn. J. Appl. Phys., vol. 63, no. 1, p.015503, Jan. 2024.

DOI: 10.35848/1347-4065/ad169b

[19] A.F. Basile et al., "Near-interface Traps in n-type SiO2/SiC MOS Capacitors from Energy-resolved CCDLTS," MRS Proc., vol. 1246, p.1246-B09-02, 2010.

DOI: 10.1557/proc-1246-b09-02

[20] M. Wilson et al., "Review—Recent Advancement in Charge- and Photo-Assisted Non-Contact Electrical Characterization of SiC, GaN, and AlGaN/GaN HEMT," ECS J. Solid State Sci. Technol., vol. 6, no. 11, pp. S3129–S3140, 2017.

DOI: 10.1149/2.0291711jss

[21] S. M. Sze and K. K. Ng, Physics of semiconductor devices, Third edition. Hoboken, NJ: Wiley-Interscience, 2007.

[22] K. Iwamoto et al., "Experimental evidence for the flatband voltage shift of high-k metal-oxide-semiconductor devices due to the dipole formation at the high-k∕SiO2 interface," Applied Physics Letters, vol. 92, no. 13, p.132907, Mar. 2008.

DOI: 10.1063/1.2904650

[23] Z. Ouennoughi, C. Strenger, F. Bourouba, V. Haeublein, H. Ryssel, and L. Frey, "Conduction mechanisms in thermal nitride and dry gate oxides grown on 4H-SiC," Microelectronics Reliability, vol. 53, no. 12, p.1841–1847, Dec. 2013.

DOI: 10.1016/j.microrel.2013.06.009

[24] F.-C. Chiu, "A Review on Conduction Mechanisms in Dielectric Films," Advances in Materials Science and Engineering, vol. 2014, p.1–18, 2014.

[25] V. A. Gritsenko and A. A. Gismatulin, "Charge transport mechanism in La:HfO2," Applied Physics Letters, vol. 117, no. 14, p.142901, Oct. 2020.