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Interface Trap Profiles Near the Band Edges in 6H-SiC MOSFETs
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Characterization of SiC MOS Structures using Conductance Spectroscopy and Capacitance Voltage Analysis
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Mobility in 6H-SiC n-Channel MOSFETs
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Effects of Oxidation Conditions on the Concentration of Carbon Dangling Bonds in Oxidized 6H-SiC
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Effects of Steam Annealing on Electrical Characteristics of 3C-SiC Metal-Oxide-Semiconductor Structures
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Atomic-Scale Engineering of the SiC-SiO₂ Interface
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Comparison of High-Temperature Electrcial Characterizations of Pulsed-Laser Deposited AIN on 6H- and 4H-SiC from 25 to 450°C
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Molding-based Thin Film Patterning Techniques for SiC Surface Micromachining
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Bulk Micromachining of Polycrystalline SiC Using Si Molds Fabricated by Deep Reactive Ion Etching
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HomeMaterials Science ForumMaterials Science Forum Vols. 338-342Effects of Steam Annealing on Electrical...

Effects of Steam Annealing on Electrical Characteristics of 3C-SiC Metal-Oxide-Semiconductor Structures

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Silicon Carbide and Related Materials - 1999

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Periodical:

Materials Science Forum (Volumes 338-342)

Pages:

1129-1132

DOI:

https://doi.org/10.4028/www.scientific.net/MSF.338-342.1129

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Online since:

May 2000

Authors:

Masahito Yoshikawa, Kazutoshi Kojima, Takeshi Ohshima, Hisayoshi Itoh, Sohei Okada, Yuuki Ishida

Keywords:

3C-SiC, Interface States (or Traps), LP-CVD, MOS, Oxide Layer, Oxide-Trapped Charges, Pyrogenic Oxidation, Steam Annealing

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© 2000 Trans Tech Publications Ltd. All Rights Reserved

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