Reliable Method for Eliminating Stacking Fault on 3C-SiC(001)

Naoki Hatta; Takamitsu Kawahara; Kuniaki Yagi; Hiroyuki Nagasawa; Sergey A. Reshanov; Adolf Schöner

doi:10.4028/www.scientific.net/MSF.717-720.173

Paper Titles

Influence of Growth Mechanism on Carrier Lifetime in On-Axis Homoepitaxial Layers of 4H-SiC
p.157

The Effect of Growth Conditions on Carrier Lifetime in N-Type 4H-SiC Epitaxial Layers
p.161

Study of the Lateral Growth by VLS Mechanism Using Al-Based Melts on Patterned SiС Substrate
p.165

Buried Selective Growth of p-Doped SiC by VLS Epitaxy
p.169

Reliable Method for Eliminating Stacking Fault on 3C-SiC(001)
p.173

Freestanding 3C-SiC Grown by Sublimation Epitaxy Using 3C-SiC Templates on Silicon
p.177

Effect of Propane on Low Temperature Growth of 3C-SiC Film on Si (111) by Plasma Assisted CVD
p.181

Low Temperature Epitaxy of 3C SiC Using Hexamethyldisilane Precursor on Si <111> Substrates
p.185

CVD Heteroepitaxial Growth of 3C-SiC on 4H-SiC (0001) Substrates
p.189

HomeMaterials Science ForumMaterials Science Forum Vols. 717-720Reliable Method for Eliminating Stacking Fault on...

Reliable Method for Eliminating Stacking Fault on 3C-SiC(001)

Abstract:

A reliable method for reducing the stacking faults (SFs) is demonstrated on the 3C-SiC (001) surface. It is a practical method based on Monte Carlo (MC) simulations of SF propagation during 3C-SiC epitaxial growth, which showed that introducing some discontinuity on the (001) surface enhanced SF reduction. The method is implemented by patterning on the 3C-SiC (001) surface and subsequent homo-epitaxial growth, and this sufficiently reduced the SF density to less than 400 cm^-1. A yield of 97.4 % was estimated for a device-ready area of 10 mm²by statistical measurements of SF density on the entire epitaxial layer surface.

You might also be interested in these eBooks

Silicon Carbide and Related Materials 2011

View Preview

Info:

Periodical:

Materials Science Forum (Volumes 717-720)

Pages:

173-176

DOI:

https://doi.org/10.4028/www.scientific.net/MSF.717-720.173

Citation:

Cite this paper

Online since:

May 2012

Authors:

Naoki Hatta, Takamitsu Kawahara, Kuniaki Yagi, Hiroyuki Nagasawa, Sergey A. Reshanov, Adolf Schöner

Keywords:

3C-SiC, Cubic-SiC, Homoepitaxy, Simulation, Stacking Fault, Yield

Export:

RIS, BibTeX

Price:

Permissions CCC:

Request Permissions

Permissions PLS:

Request Permissions

Сopyright:

Citation:

References

[1] T.Kawahara, N.Hatta, K.Yagi, H.Uchida, M.Kobayashi, M.Abe, H.Nagasawa, B.Zippelius, G.Pensl: Mater.Sci.Forum Vol.645-648 (2010) p.339

DOI: 10.4028/www.scientific.net/msf.645-648.339

Google Scholar

[2] H. Nagasawa, T. Kawahara, K. Yagi, N. Hatta, H. Uchida, M. Kobayashi, S. Reshanov, R. Esteve, and A. Schöner: Proceedings of HeteroSiC-WASMPE 2011, to be published.

DOI: 10.4028/www.scientific.net/msf.711.91

Google Scholar

[3] K.Shibahara, S.Nishino, and H.Matsunami: J.Cryst.Growth Vol.78 (1986) p.538

Google Scholar

[4] H.Nagasawa, T.Kawahara, K.Yagi: Mater.Sci.Forum Vol. 389-393 (2002) p.319

Google Scholar

[5] K.Yagi, T.Kawahara, N.Hatta, H.Nagasawa: Mater. Sci. Forum Vol. 527-529 (2006) p.291

Google Scholar

[6] H. Nagasawa, T. Kawahara, K. Yagi, N. Hatta: Mater. Sci. Forum Vol.679-680 (2011), p.282

Google Scholar