Novel Gate Oxide Process for Realization of High Threshold Voltage in 4H-SiC MOSFET

Masayuki Furuhashi; Toshikazu Tanioka; Masayuki Imaizumi; Naruhisa Miura; Satoshi Yamakawa

doi:10.4028/www.scientific.net/MSF.778-780.985

Paper Titles

Reliability Performance of 1200 V and 1700 V 4H-SiC DMOSFETs for Next Generation Power Conversion Applications
p.967

Comparison of 600V Si, SiC and GaN Power Devices
p.971

Improvement of Channel Mobility in 4H-SiC C-Face MOSFETs by H₂ Rich Wet Re-Oxidation
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Electrical Characteristics/Reliability Affected by Defects Analyzed by the Integrated Evaluation Platform for SiC Epitaxial Films
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Novel Gate Oxide Process for Realization of High Threshold Voltage in 4H-SiC MOSFET
p.985

Comparative Study of 4H-SiC DMOSFETs with N₂O Thermal Oxide and Deposit Oxide with Post Oxidation Anneal
p.989

Characterization of SiO₂/4H-SiC Interface by Device Simulation and Temperature Dependence of On-Resistance of SiC MOSFET
p.993

Selection of SPICE Parameters and Equations for Effective Simulation of Circuits with 4H-SiC Power MOSFETs
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Rapidly Maturing SiC Junction Transistors Featuring Current Gain (β) > 130, Blocking Voltages up to 2700 V and Stable Long-Term Operation
p.1001

HomeMaterials Science ForumMaterials Science Forum Vols. 778-780Novel Gate Oxide Process for Realization of High...

Novel Gate Oxide Process for Realization of High Threshold Voltage in 4H-SiC MOSFET

Abstract:

We found that threshold voltage (V_th) of a 4H-SiC MOSFET increases drastically by performing low temperature wet oxidation after nitridation in a gate oxide process. The increment of V_th depends on the wet oxidation conditions. Wet oxidation increases the interface trap density (D_it) at deep level of SiC bandgap and decreases positive charge density inside the gate oxide layer. The amount change of the interface traps and the positive charges in the gate oxide makes V_th higher without a decrease in the channel mobility. We improved the trade-off between V_th and effective carrier mobility (μ_eff) in the MOSFET channel, and realized a low specific on-resistance (R_on,sp) SiC-MOSFET with V_th over 5 V by using the newly developed process.

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Periodical:

Materials Science Forum (Volumes 778-780)

Pages:

985-988

DOI:

https://doi.org/10.4028/www.scientific.net/MSF.778-780.985

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Online since:

February 2014

Authors:

Masayuki Furuhashi*, Toshikazu Tanioka, Masayuki Imaizumi, Naruhisa Miura, Satoshi Yamakawa

Keywords:

Channel Mobility, MOSFET, Silicon Carbide (SiC), Threshold Voltage

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