Annealing Temperature Dependence of Dislocation Extension and its Effect on Electrical Characteristic of 4H-SiC PIN Diode

Atsushi Tanaka; Naoyuki Kawabata; Masatoshi Tsujimura; Yukihiro Furukawa; Taizo Hoshino; Yoshinori Ueji; Kazuhiko Omote; Hirotaka Yamaguchi; Hirofumi Matsuhata; Kenji Fukuda

doi:10.4028/www.scientific.net/MSF.821-823.315

Paper Titles

Elimination of Basal Plane Dislocations in Epitaxial 4H-SiC via Multicycle Rapid Thermal Annealing
p.297

Basal Plane Dislocation Analysis of 4H-SiC Using Multi Directional STEM Observation
p.303

Study on Formation of Dislocation Contrast in 4H-SiC Wafer in Mirror Projection Electron Microscopy Image
p.307

Relations between Surface Morphology and Dislocations of SiC Crystal
p.311

Annealing Temperature Dependence of Dislocation Extension and its Effect on Electrical Characteristic of 4H-SiC PIN Diode
p.315

Studies of the Origins of Half Loop Arrays and Interfacial Dislocations Observed in Homoepitaxial Layers of 4H-SiC
p.319

Identification of Stacking Faults by UV Photoluminescence Imaging Spectroscopy on Thick, Lightly-Doped n-Type 4°-off 4H-SiC Epilayers
p.323

Photoluminescence Study of Oxidation-Induced Stacking Faults in 4H-SiC Epilayers
p.327

Simple Models for Stacking-Fault Formations in 4H-SiС Epitaxial Layer
p.331

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Annealing Temperature Dependence of Dislocation Extension and its Effect on Electrical Characteristic of 4H-SiC PIN Diode

Abstract:

In this study, we investigated the annealing temperature dependence of dislocation extension in an ion-implanted region of a 4H-silicon carbide (SiC) C-face epitaxial layer, revealing that a high temperature annealing led to dislocation formation. We also investigated the current-voltage (I-V) characteristics of a 4H-SiC PIN diode with and without these extended dislocations. We demonstrated that the forward biased I-V characteristics of samples with extended interfacial dislocations have a kink at lower current regions.