Improvement of the Current Gain Stability of SiC Junction Transistors

Siddarth G. Sundaresan; Brian Grummel; Dean Hamilton; Ranbir Singh

doi:10.4028/www.scientific.net/MSF.821-823.822

Paper Titles

Temperature Dependent Characterization of Bipolar Injection Field-Effect-Transistors (BiFET) for Determining the Short-Circuit-Capability
p.806

Short-Circuit Capability Exploration of Silicon Carbide Devices
p.810

Characterization and Comparison of 1.2kV SiC Power Devices from Cryogenic to High Temperature
p.814

Improvement of Current Gain and Breakdown Voltage in 4H-SiC BJTs Employing High-k Dielectric as an Interfacial Layer
p.818

Improvement of the Current Gain Stability of SiC Junction Transistors
p.822

Dynamic Voltage Rise Control (DVRC) Applied to SiC Bipolar Junction Transistors
p.826

Development of a PSPICE Model for 1200 V/800 A SiC Bipolar Junction Transistor Power Module
p.830

Investigation of the Breakdown Voltage in High Voltage 4H-SiC BJT with Respect to Oxide and Interface Charges
p.834

4.5-kV 20-mΩ.cm² Implantation-Free 4H-SiC BJT with Trench Structures on the Junction Termination Extension
p.838

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Improvement of the Current Gain Stability of SiC Junction Transistors

Abstract:

SiC Junction Transistors (SJTs) with 1900 V Drain-Source breakdown voltages, current gain (h_FE) higher than 120 and low on-resistance of 22 mΩ (3.5 mΩ-cm²) are reported in this paper. SJTs with a pre-stress h_FE of 90 suffer only a 10% reduction of the h_FE after 190 hours under a 200 A/cm² DC current stress at a T_J of 125°C, while a similar stress on earlier generation SJTs resulted in over 25% h_FE reduction in only 25 hours. SJT die with pre-stress h_FE in the range of 120-125 show absolutely no current gain degradation even after a 300°C/ 2 hour stress at 60 A/cm² DC drain current.