1.2-kV SiC Trench-Etched Double-Diffused MOS (TED-MOS)

Abstract:

A novel structure, trench-eched double-diffused MOS (TED-MOS), were proposed. In this study, we demonstrate compatibility of reliability and small loss for applications to electric vehicle. To suppress the dielectric breakdown of gate insulator, a field relaxation layer (FRL) are formed above JFET region. Device simulation shows an effective decrease of electric field on gate dioxide, and furthure improvement of switching-and conduction-loss were expected. The fabricated TED-MOS chip doesn’t show gate leakage current even over 1600 V. We confirmed stable normally-off characteristic of the chip at 175 °C, and its R_on was 66 mΩ under V_g = 20 V and 175 °C condition. As an uniqueness to FRL TED-MOS, capacitance shows a steep decline with several step, which may attributed to depletion between FRL and p-Body and should contributed to the reduction of switching loss.

• Periodical: Materials Science Forum (Volume 963)
• Pages: 617-620
• DOI: https://doi.org/10.4028/www.scientific.net/MSF.963.617
• Online since: July 2019
• Authors: Takeru Suto*, Naoki Watanabe, Yuan Bu, Hiroshi Miki, Naoki Tega, Yuki Mori, Digh Hisamoto, Akio Shima
• Keywords: 1200 V, 4H-SiC, Device Structure, Electric Vehicle, Trench MOSFET

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