Dynamic Characterization and Robustness Test of High Voltage SiC MOSFETs

Victor Soler; Maria Cabello; Viorel Banu; Josep Montserrat; Jose Rebollo; Philippe Godignon; Enea Bianda; Lars Knoll; Lukas Kranz; Andrei Mihaila

doi:10.4028/www.scientific.net/MSF.963.768

Paper Titles

Novel Method for Evaluation of Negative Bias Temperature Instability of SiC MOSFETs
p.749

1200 V SiC MOSFETs with Stable V_TH under High Temperature Gate Bias Stress
p.753

Influence of High-Temperature Bias Stress on Room-Temperature V_T Drift Measurements in SiC Power MOSFETs
p.757

Design Considerations for Robust Manufacturing and High Yield of 1.2 kV 4H-SiC VDMOS Transistors
p.763

Dynamic Characterization and Robustness Test of High Voltage SiC MOSFETs
p.768

Avalanche Ruggedness Characterization of 10 kV 4H-SiC MOSFETs
p.773

Avalanche Robustness of 4600 V SiC DMOSFETs
p.777

Reliability and Ruggedness of Planar Silicon Carbide MOSFETs
p.782

Capability of SiC MOSFETs under Short-Circuit Tests and Development of a Thermal Model by Finite Element Analysis
p.788

HomeMaterials Science ForumMaterials Science Forum Vol. 963Dynamic Characterization and Robustness Test of...

Dynamic Characterization and Robustness Test of High Voltage SiC MOSFETs

Abstract:

This work addresses the electrical behaviour of high-voltage (HV) SiC MOSFETs, being the main motivation to check their robustness. Large area (25 mm²) devices rated for 3.3 kV applications were fabricated with a special process for the gate oxide formation. The unit cell was designed to achieve good short-circuit performance. Static and dynamic characterization is presented at room and high temperature. Output curves and 3^rd quadrant behaviour were analysed. Dynamic tests were performed at high bus voltages and high current. To check device robustness, short-circuit and power cycling’s were considered. Robustness test results put in evidence the achievement of reasonable good results obtained due to a suitable cell design.