Solid State Phenomena Vol. 360

Abstract: In this paper, a simple compact model for the static behavior of SiC MPS diodes is developed in the form of a SPICE-compatible subcircuit. The model is suited to describe the undesired snapback mechanism likely to occur in unoptimized high-voltage MPS structures with narrow width of the PiN portion and/or very thick drift layer; in particular, the model accounts for the snapback mechanism both as the cell extension varies and as individual portions of Schottky and PiN vary. Sentaurus TCAD simulations of a 10-kV MPS diode are used as a reference for the calibration of the model parameters and accuracy verification.

Abstract: In this work a groundbreaking SiC power MOSFET based on innovative vertical Gate All Around (GAA) concept is presented. Extensive TCAD simulations are performed to analyze the performance in forward as well as in reverse conditions for this new device concept. The proposed design has a target rating voltage of 1200V, suitable for e-mobility applications.

Abstract: In this study, the simultaneous realization of high-speed and high-temperature switching operations is demonstrated using a custom-made high-speed and high-temperature power module installed with a silicon carbide (SiC) CMOS gate driver, which can reduce gate loop inductance and operate at high temperatures. Approximate switching speeds of 70 and 60 V/ns are achieved during the turn-on and turn-off operations, respectively, at 300°C, 600 V DC bus voltage, and 20 A load current using the developed module. The switching speed remained above 50 V/ns in the temperature range from room temperature to 300°C. Numerical calculations based on the static properties of the SiC power MOSFET and CMOS gate driver can predict the actual switching properties over a wide temperature range when the developed module incorporating the fabricated SiC CMOS gate driver is used.

Abstract: Novel diode structure which looks like DMOSFETs with the gate-shorted to n⁺ source has been developed for the first time. The lateral JFET channel as a built-in channel instead of gate oxide is integrated and it is pinched-off under the zero bias condition. As JFET diode decreases the forward voltage drop using JFET channel efficiency rather than the cell pitch reduction or the increase of doping concentration in n-SiC drift region, V_F and capacitive charges which have a trade-off relationship typically could be decreased simultaneously and a better switching performance is also expected accordingly. Figure-of-Merit (=V_F×Q_C) of the proposed JFET diode has been improved by 20.2% in average compared to that of JBS diode and this FOM would be the best in class among 1200V SiC diode products.

Abstract: Under short-circuit (SC) testing SiC MOSFETs exhibit an exceptional increase of gate current (100’s mA) which is not observed in their Si counterparts. Electro-thermal TCAD simulations are capable to accurately mimic all the details of measured gate current waveforms (i_G) by capturing multiple physical mechanisms. One of these mechanisms is the thermionic or Schottky emission effect occurring at extreme temperatures (>1300K) for relatively thick gate oxides (>40nm). For the first time, it is proven that TCAD tunneling models, recommended for very thin oxides (<3nm), are suitable to reproduce the thermionic effect and predict i_G in SiC MOSFETs under SC test.

Abstract: The high-speed switching capabilities of wide bandgap (WBG) power devices have posed challenges in accurately evaluating their dynamic characteristics, primarily due to the increasing influence of parasitic components in switching test circuits. To address this issue, we investigated the impact of parasitics by conducting dynamic tests and schematic-level transient simulation on a half-bridge switching circuit incorporating SiC MOSFETs. This comparative analysis identified specific parasitic components responsible for undesirable behaviors such as spikes and ringing in the switching waveform. Our findings provide insights into which parasitic components in the test circuit are critical for the accurate dynamic characterization of SiC MOSFETs.

Abstract: In this work, an analytical model describing the quasi-static operation of a monolithically integrated SiC solid-state circuit breaker (SSCB) device is rederived and refined. This SSCB is based on a 4H-SiC JFET technology offering a self-sensed blocking mechanism. The proposed model is solely based on physical parameters including the SSCB design parameters. With respect to the refinement, the proposed model is not limited to one-sided pn-junctions, considers incomplete ionization of dopants, and is able to represent breakdown characteristics. In this regard, the JFET gate breakdown characteristics are derived taking thermionic emission, space-charge-limited current and impact ionization into account. To calculate the SSCB output characteristics, a bisection-based optimization algorithm is applied carefully considering individual JFET operating states.

Abstract: This paper presents micro-OBIC measurements performed at different biasing on two power devices protected by a combination of P⁺ rings embedded in a JTE Zone. Thanks to the micro-OBIC micrometer spatial resolution, small gaps can be visible on OBIC profiles. Thus, the spatial variation of the micro-OBIC signal accurately reflects the topology of the periphery protection: combination of JTE and rings and channel stopper. These measurements agree with the electric field distribution (calculated by finite element method) along the structure.

Abstract: In this paper, a first demonstration of the optical triggering of a 10 kV 4H-SiC Bipolar Junction Transistor is reported. A laser emitting UV (349 nm) has been used for the generation electron-hole pairs within the device. A current density of about 20 A.cm^-2 has been obtained. This low value in comparison with 100 A.cm^-2 for “conventional” BJT is due to the narrow pulse width (5 ns). The current waveform shows the effect of the carrier lifetime in the base and collector regions. From these measurements, we have extracted the I_C (V_CE) characteristics for different laser optical power and the switch-on time which is about 1 µs.

Abstract: This research investigates the static and dynamic characteristics of 4H-Silicon Carbide (SiC) MOSFETs with different gate structures: planar (Device A), one-side shielded trench (Device B), and double trench (Device C). We analyze threshold voltage, on-state resistance, transconductance, gate-to-source capacitances, and reverse transfer/miller capacitances with gate bias. Additionally, non-linear charges, including input charge, miller plateau, and total gate charge, are examined. Switching losses are assessed over a temperature range of 25° C to 125° C. Our findings reveal distinct performance differences, offering valuable insights for optimizing SiC MOSFETs in electric vehicle applications.