Gate Oxide Stability and Degradation Modes of Next Generation SiC MOSFETs

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Abstract:

The long-term reliability of silicon carbide MOSFETs is critically influenced by the stability of the gate oxide, which is susceptible to degradation due to high defect densities at the oxide-semiconductor interface. This work presents a comprehensive investigation of gate oxide degradation in next-generation SiC MOSFETs, comparing planar and trench device topologies under both static and dynamic stress conditions. Time-dependent dielectric breakdown measurements reveal degradation phases that are strongly dependent on device topology. Comparative analysis of various gate stress methodologies shows that dynamic switching stress exerts a more pronounced impact on trench devices than on planar devices. Thus, highlighting the need of tailoring reliability test protocols to the specific device topology, rather than adopting a generalized approach.

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