Cumulative Threshold Voltage Shift Induced by Surge Current in Planar SiC MOSFETs after Bipolar Gate Switching Stress

In this work, we report the impact of combined surge current stress and bipolar gate switching stress (GSS) on the threshold voltage (V_th) shift of planar SiC MOSFETs. The V_th shift exhibits a strong dependence on the sequence of these two applied stresses. It is found that both the surge current stress and GSS can separately result in a positive shift in V_th, and the V_th shift is cumulatively aggravated in the combined stresses only if the bipolar GSS is applied first. This is attributed to the generation of new defects during the bipolar gate switching, which act as trap centers for subsequent surge stress. This finding reveals the cumulative damage characteristics of SiC MOSFETs under complex operating conditions.

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Periodical:

Key Engineering Materials (Volume 1054)

Pages:

85-89

DOI:

https://doi.org/10.4028/p-z4RfMy

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Cite this paper

Online since:

May 2026

Authors:

Ke Wei, Wang Chen Li, Chen Xi Li, Hua Xing Jiang*

Keywords:

Gate Switching Instability (GSI), Recovery, Stress, Surges Current, Threshold Voltage (V_th)

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Creative Commons CC BY 4.0

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* - Corresponding Author

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