Ab initio calculations were carried out to study the origin of the trap at the SiO2/SiC (MOS: Metal-Oxide-Semiconductor) interface with the three different faces of the substrate, (0001), (000-1), and (11-20). In a previous report we experimentally discovered that the (11-20) face is suitable for high channel mobility. The calculation in this report showed that the MOS interface achieved the intermediate states due to distortion and thus acted like an interface trap. The interface trap density of the MOS interface on the (11-20) face substrate was smaller than those on the other faces. The interface trap densities were 2.14, 3.36, and 1.40 in units of 1015 cm-2 for the above listed substrate orientations, respectively. For clarity, the channel mobility was compared experimentally to reveal that it realized a larger value for the (11-20) substrate than the other two faces. From our results, we concluded that (11-20) face substrate was more suitable for high power device applications than the (0001) face or (000-1) face substrates.