Experimental Evaluation of Different Passivation Layers on the Performance of 3kV 4H-SiC BJTs

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In this work, the electrical performance in terms of maximum current gain, ON-resistance and blocking capability has been compared for 4H-SiC BJTs passivated with different surface passivation layers. Variation in BJT performance has been correlated to densities of interface traps and fixed oxide charge, as evaluated through MOS capacitors. Six different methods were used to fabricate SiO2 surface passivation on BJT samples from the same wafer. The highest current gain was obtained for PECVD deposited SiO2 which was annealed in N2O ambient at 1100 °C during 3 hours. Variations in breakdown voltage for different surface passivations were also found, and this is attributed to differences in fixed oxide charge that can affect the optimum dose of the high voltage JTE termination.

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Materials Science Forum (Volumes 645-648)

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661-664

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April 2010

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© 2010 Trans Tech Publications Ltd. All Rights Reserved

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[1] M. Domeij, H. -S. Lee, E. Danielsson, C. -M. Zetterling, M. Östling and A. Schöner: IEEE Electron Device Letters, Vol. 26 (2005), pp.743-745.

DOI: 10.1109/led.2005.856010

Google Scholar

[2] A. Galeckas, J. Linnros, M. Frischholz, and V. Grivickas, Appl. Phys. Lett. Vol. 79 (2001), p.365.

DOI: 10.1063/1.1385588

Google Scholar

[3] J. Zhang, J. Wu, P. Alexandrov, T. Burke, K. Sheng, and J. H. Zhao, Mater. Sci. Forum Vol. 527-529 (2006), p.1417.

Google Scholar

[4] H. -S. Lee, M. Domeij, C. -M. Zetterling, M. Östling, 1 F. Allerstam and E. Ö. Sveinbjörnsson, App. Phys. Lett Vol. 92 (2008), p.082113.

DOI: 10.1063/1.2888965

Google Scholar

[5] R. Ghandi, B. Buono, M. Domeij, G. Malm, C. -M Zetterling, M. Östling, High Voltage 4H- SiC PiN Diodes with Etched Junction Termination Extension, Accepted for IEEE Electron Device Letters.

DOI: 10.1109/led.2009.2030374

Google Scholar