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JTE-Based Termination Design and Technology Considerations for 1500 V 4H-SiC Superjunction MOSFETs
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Study of Single-Event-Burnout for Refilled-PMOS SiC Trench MOSFET
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HomeKey Engineering MaterialsKey Engineering Materials Vol. 10552x Current Boosting Scheme in 3300 v 4H-SiC...

2x Current Boosting Scheme in 3300 v 4H-SiC VDMOSFET

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Abstract:

We experimentally demonstrated a ~2x on-current enhancement in VDMOSFET fabricated in a standard 3300 V-rated 4H-SiC process. The on-current improvement is achieved by applying a positive bias to the p-well region when the VDMOSFET is in the on-state. A 5x10³-10⁴ ratio between the on-current gain and the p-well current gain is shown. TCAD simulations are performed to study the underlying mechanisms of the on-current gain.

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Periodical:

Key Engineering Materials (Volume 1055)

Pages:

69-74

DOI:

https://doi.org/10.4028/p-q19NrM

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Online since:

May 2026

Authors:

Yuniarto Widjaja*, Valerii Nebesnyi, Oleksandr Maistriuk, Asen Asenov, Nikolas Xeni, Tapas Dutta, Djamel Bensouiah, Servin Rathi, Leo Laborie, Robert Young, Yunyi Qi, David T. Clark

Keywords:

3300 V, Low Specific On-Resistance, On-Current Improvement, P-Well Bias, Silicon Carbide (SiC)

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* - Corresponding Author

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