Silicon Carbide and Related Materials 2006

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Authors: Anne Elisabeth Bazin, Thierry Chassagne, Jean François Michaud, André Leycuras, Marc Portail, Marcin Zielinski, Emmanuel Collard, Daniel Alquier
Abstract: In this work, ohmic contacts, formed by 100nm Ni layer RTA annealed or not, were investigated on 3C-SiC epilayers exhibiting different nitrogen doping levels. The epilayers were grown on (100) silicon. Doping level (N) and eventual dopant contamination (Al) were analyzed by C-V and/or SIMS. The specific contact resistance was determined by using Transmission Line Model (TLM) patterns for each condition (doping and annealing). Our results clearly evidence that very low specific contact resistance (~10-51.cm²) is obtained on highly doped 3C-SiC epilayers, enlightening the interest of both material and Ni contacts for future devices fabrication.
Authors: Lilyana Kolaklieva, Roumen Kakanakov, Iva Avramova, Ts. Marinova
Abstract: Electrical, morphological and chemical properties of nanolayered Au/Ti/Al ohmic contacts with different Ti:Al ratio are investigated. Contact resistivities of 1.42×10-5 ⋅cm2 and 1.21×10-5 ⋅cm2 are achieved for Au/Ti(70)/Al(30) and Au/Ti(30)/Al(70) contacts, respectively. It is found that the Ti:Al ratio does not affect the lowest resistivity value but influences on the optimal annealing temperature at which it is obtained. The different optimal annealing temperature provokes different element distributions and interface chemistry of the annealed contacts. An increase of the Al concentration in the contact composition causes essentially the surface morphology leading to an increase in surface roughness of the as-deposited and annealed contacts.
Authors: Kenneth M. Robb
Abstract: In this initial phase of work, two methods of backside wafer thinning using ICP plasma etching of two-inch SiC substrates have been considered. Plasma processes were optimized for nonbonded and bonded wafers. The non-bonded process was used to etch 250μm thick substrates to a final thickness of 100μm. The bonded process was used to etch glass bonded SiC substrates mechanically ground to 130μm thick and plasma etched to a final thickness of 100μm. Etch rate measurements and surface analysis were performed using a profilometer and white light interferometry. Etch rates of 3.4μm/min were achieved for the bonded process and 2.0μm/min for the non-bonded process. The surface morphology for the non-bonded process was three to four times lower than the bonded process. The part mechanically ground samples showed evidence of surface damage from the grinding process after plasma etching.
Authors: S. Takenami, Tomoaki Hatayama, Hiroshi Yano, Yukiharu Uraoka, Takashi Fuyuki
Abstract: Sloped sidewalls in 4H-SiC mesa structures on the (000-1) C face were formed by a Cl2-O2 thermal etching method. The etching rate of 4H-SiC (000-1) C face was 10 times faster than that of (0001) Si face, and the etching rate at 910oC was about 18μm/h. The etched surface was rather smooth, and the sidewall of the mesa was inclined to the off-axis substrate. Taking into account the off angle of about 8o toward [11-20] off direction, the angles of the sidewalls were 52-56o for the <1-100> and 55-57o for the <11-20> directions from the crystallographically accurate (000-1) C face. Epitaxial pn junction diodes with the sloped sidewalls structure were fabricated, which had good electrical properties.
Authors: Oleg Korolkov, Natalja Sleptsuk, Toomas Rang, A. Syrkin, Vladimir Dmitriev
Abstract: For more authentic comparison of Schottky parameters between combined sputter (Ti/Ni/Au) and diffusion welded (DW) Al contact and direct DW Al contact to SiC the forward current-voltage characteristics were measured at the temperature range 293-473 K on full-packed 0.3 cm2 Schottky diodes. Surprising fact was discovered that the temperature behaviour of parameters remains of the same character for both kind of contacts but for the combined sputter- DW samples the values of parameters is much closer in magnitude to sputter contacts. Apparently, chemical treatment before the DW process preserves untouched the contact surface layer formed by annealing of initial sputter metallization of the chips (e.g. Ni2Si, Ti3SiC2), and this layer serves as barrier during diffusion welding. In the second part of the work we give the results on long-term reliability testing where through the SiC Schottky diode with the DW Al contacts during 300 hr has been passed constant forward stabilized current of 100 A/cm2 density. The primary and final values of Uf for DW Schottky contact have not changed during the test.
Authors: Yue Ke, Robert P. Devaty, Wolfgang J. Choyke
Abstract: We have fabricated columnar nano-porous SiC by photo-electrochemical etching on the C-face of n-type 6H SiC at constant voltage. SEM images reveal that the pores are long, straight and parallel with diameters of about 20 nm. We have produced such layers up to 250 μm thick. The pore morphologies for both Si and C-face SiC samples are compared and discussed as a part of the effort to understand the growth mechanism. It is found that the constant voltage etching condition on C-face SiC is crucial for this nano-columnar pore formation.
Authors: C.K. Young, G.T. Andrews, Maynard J. Clouter, Yue Ke, Wolfgang J. Choyke, Robert P. Devaty
Abstract: Brillouin light scattering spectroscopy was used to probe porous silicon carbide films formed from p-type 6H crystalline silicon carbide. The porosities of the films ranged from 30% to 58%. Surface and bulk acoustic wave velocities were measured and compared with those calculated from the Mori-Tanaka acoustic effective medium model. Qualitative agreement is obtained between the experimentally determined velocities and those predicted by Mori-Tanaka acoustic effective medium models with spherical pores and, in the case of surface acoustic waves, also with prolate spheroidal pores with shape factor equal to 0.2. The model demonstrates the importance of morphology in determining the behavior of acoustic waves in a porous material.
Authors: Hideyuki Hara, Yasuhisa Sano, Hidekazu Mimura, Kenta Arima, Akihisa Kubota, Keita Yagi, Junji Murata, Kazuto Yamauchi
Abstract: We report the damage-free planarization of 4H-SiC (0001) wafers using a new planarization technique we named CAtalyst-Referred Etching (CARE). The CARE setup equipped with a polishing pad made of a catalyst is almost the same as a lapping setup. Since the catalyst generates reactive species that activate only when they are next to the catalyst surface, SiC can be chemically removed in contact with the catalyst surface with a pressure noticeably lower than that in a conventional polishing process. The processed surfaces were observed by optical interferometry and AFM. These observations presented a marked reduction in surface roughness. A step-terrace structure was observed with a step height of approximately 3み, corresponding to one-bilayer thickness of Si and C, in the AFM images. To estimate the crystallographic properties of the CARE-processed surface, the surfaces were observed by cross-sectional TEM. The TEM images showed that a more crystallographically well-ordered surface was realized in comparison with the conventional CMP-processed surface.
Authors: Tomohisa Kato, Keisuke Wada, Eiji Hozomi, Hiroyoshi Taniguchi, Tomonori Miura, Shin Ichi Nishizawa, Kazuo Arai
Abstract: We report SiC wafer polishing study to achieve high throughput with extremely flat, smooth and damageless surface. The polishing consists of three process, wafer grinding, lapping and chemical mechanical polishing (CMP), which are completed in shortest about 200 minutes in total for 2 inch wafer. Specimens of 4H- and 6H-SiC were provided from slicing single crystal as wafers oriented (0001) with 0 or 8 degrees offset angle toward to <112 _ 0>. By the first grinding using a diamond whetstone wheel, we realized flat surface on the wafers with small TTV error of 1 μm in 15 minutes. After second process of lapping, the wafers were finished by CMP using colloidal silica slurry. AFM observation showed not only scratch-free surface but also atomic steps on the wafers after CMP. Rms marks extremely flat value of 0.08 nm in 10 μm square area.
Authors: Yasuhisa Sano, Masayo Watanabe, Kazuya Yamamura, Kazuto Yamauchi, Takeshi Ishida, Kenta Arima, Akihisa Kubota, Yuzo Mori
Abstract: Silicon carbide (SiC) is a promising semiconductor material for power devices. However, it is so hard and so chemically stable that there is no efficient method of machining it without causing damage to the machined surface. Plasma chemical vaporization machining (PCVM) is plasma etching in atmospheric-pressure plasma. PCVM has a high removal rate equivalent to those of conventional machining methods such as grinding and lapping, because the radical density in atmospheric-pressure plasma is much higher than that in normal low-pressure plasma. In this paper, the polishing characteristics of SiC by PCVM are described. As a result of machining, the surface roughnesses of both Si- and C-faces were improved under a relatively low-etch-rate (100-200 nm/min) condition. The C-face was also improved under a relatively high-etch-rate (approximately 10 μm/min) condition, and a very smooth surface (below 2 nm peak-to-valley in a 500-nm-square area) was achieved.

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