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Paper Title Page
Abstract: Aiming to minimize the interface state density, we fabricated MOS capacitors on n-type
4H-SiC by using wet oxidation of nitrogen implanted layers. We investigated a wide range of
implantation dose, including a high dose able to amorphise a surface SiC layer with the intent to
reduce the oxidation time. The oxide quality and the SiO2-SiC interface properties were
characterized by capacitance-voltage measurements of the MOS capacitors. The proposed process,
in which nitrogen is ion-implanted on SiC layer before a wet oxidation, is effective to reduce the
density of interface states near the conduction band edge if a high concentration of nitrogen is
introduced at the SiO2-SiC interface. We found that only the nitrogen implanted at the oxide-SiC
interface reduces the interface states and we did not observe the generation of fixed positive charges
in the oxide as a consequence of nitrogen implantation. Furthermore, the concentration of the slow
traps evaluated from the Slow Trap Profiling technique was low and did not depend on the nitrogen
implantation fluence.
639
Abstract: We have investigated the electrical properties of metal-oxide-semiconductor (MOS)
capacitors with atomic-layer-deposited La2O3, thermal-nitrided SiO2, and atomic-layer-deposited
La2O3/thermal-nitrided SiO2 on n-type 4H-SiC. A significant reduction in leakage current density has
been observed in La2O3 structure when a 6-nm thick thermal nitrided SiO2 has been sandwiched
between the La2O3 and SiC. However, this reduction is still considered high if compared to sample
having thermal-nitrided SiO2 alone. The reasons for this have been explained in this paper.
643
Abstract: We have fabricated advanced metal-oxide-semiconductor (MOS) capacitors with ultra thin
(5 nm) remote-PECVD SixNy dielectric layers and investigated electrical properties of nitrided
SiO2/4H-SiC interface after oxidizing the SixNy in dry oxygen at 1150 °C for 30, 60, 90 min.
Improvements of electrical properties have been revealed in capacitance-voltage (C-V) and
current density-electrical field (J-E) measurements in comparison with dry oxide. The improvements
of SiC MOS capacitors formed by oxidizing the pre-deposited SixNy have been explained in this
paper.
647
Abstract: 4H-SiC p-type MOS capacitors fabricated by wet oxidation of SiC preamorphized
by nitrogen ion (N+) implantation have been investigated. The oxidation rate of the SiC layer
preamorphized by high-dose N+ was much larger than that of crystalline SiC, allowing us
to reduce the fabrication time of SiC MOS devices. We found that the presence of the surface
amorphous SiC layer before the oxidation process did not influence the interface state density in
MOS capacitors. Moreover, the shift of the flat-band voltage is not correlated to the amount of
nitrogen in the oxide. On the contrary the density of interface states near the valence band edge
increased according with the high concentration of the implanted N at the oxide–SiC interface,
as in the case of dry oxidation reported by Ciobanu et al. The generation of positive charges
due to the nitrogen embedded inside the oxide layer was smaller compared with dry oxidation.
We discuss the difference between wet and dry oxidation for MOS capacitors fabricated with
N+ implantation.
651
Abstract: We investigated the growth, interface formation as well as the structural and electrical
properties of crystalline gadolinium oxide (Gd2O3) directly grown on 6H-SiC(0001) substrates by
molecular beam epitaxy. The Gd2O3 layers were found to grow epitaxially resulting in the formation
of flat (111) oriented layers with the cubic bixbyite type of structure. X-ray photoelectron
spectroscopy measurements reveal a silicate-like Gd2O3/SiC interface. Furthermore, conduction and
valence band discontinuities at the Gd2O3/6H-SiC interface were estimated with 1.9 eV and 1.2 eV,
respectively. The fabricated capacitors exhibit suitable dielectric properties at room temperature;
such as a dielectric constant of ε = 22, a leakage current of 10-8 A/cm2@1V and breakdown fields >
4.3 MV/cm for layers with 14 nm thickness. The CV measurements exhibit only small negative flat
band shifts and a very small hysteresis, resulting from fixed charges or interface trap levels in the
range of 1x1012 cm-2. These properties make Gd2O3 suitable for high-k application also for SiC.
655
Abstract: In this study, we have investigated N2O oxidation of various off-angled 4H-SiC (0001) epilayers and
characterized the properties of MOS interfaces. The oxide thickness almost linearly increases with
increasing off-angle. Oxidation on highly off-angled (0001) 4H-SiC is faster than that on 8o off-axis
(0001). The off-angle dependence of Dit is very small for the MOS capacitors in the off-angle range
from 8o to 30o. The depth profiles of carbon and nitrogen atoms near the MOS interface on 15o
off-axis 4H-SiC(0001) are similar to those on 8o off-axis (0001).
659
Abstract: We performed high-pressure H2O vapor annealing on 4H-SiC n-MOS capacitors to
control SiO2/4H-SiC interface properties. High-pressure H2O annealing was performed at 270~
420oC at a pressure of 1.31~1.67MPa. Effective negative fixed oxide charge decreased with
increasing anneal temperature in the case annealed with Al gate electrodes. However, it increased
with increasing anneal temperature in the case annealed without Al gate electrodes. The effect of
annealing was much larger on the C-face than that of Si-face. Interface state densities near the
conduction band edge was decreased at 420oC under 1.67MPa compared to other samples,
especially on the C-face n-MOS capacitors.
663
Abstract: Optimization of the thermally oxidized 4H-SiC MOS interface has produced p-channel
lateral MOSFETs with hole inversion layer mobility as high as 10 cm2/Vs. This has been
accomplished by identifying the 1200oC Dry, 950oC Wet (un-nitrided) oxidation as ideal for hole
conduction across the MOS inversion layer and by implant activation annealing at 1800oC of the
heavily implanted n-type well. High temperature measurements show that the high mobility and
normally-off operation is maintained throughout the operating temperature range. Oxide leakage
measurements yield a dielectric strength of 8.5 MV/cm with 90% yield, thereby enabling the
manufacture of high performance p-channel devices like the IGBT.
667
Abstract: Characterizations of Al/Polyimide/Al capacitors in a temperature range extended up to
400°C are presented. The aim is to determine the retained BPDA/PPD polyimide (PI) intrinsic
dielectric and conduction properties, as a first stage in the evaluation of its ability to be applied as a
passivation material for high temperature operating silicon carbide power devices. The dielectric
constant, dielectric loss factor, and the static leakage current of the “as-prepared” Al/PI/Al
structures are strongly affected above 175°C, reaching critical values at 400°C with regard to the
aimed application. However, an evolution of these characteristics after the sample exposure at high
temperature is observed, resulting in a very good and stabilized electrical behavior even at 400°C.
671
Abstract: Thermal oxides on 4H-SiC are characterized using time-dependent dielectric breakdown
techniques at electric fields between 6 and 10 MV/cm. At 250°C, oxides thermally-grown using
N2O with NO annealing achieve a mean time to failure (MTTF) of 2300 hours at 6 MV/cm. Oxides
grown in steam with NO annealing show approximately four times longer MTTF than N2O-grown
oxides. At electric fields greater than 8 MV/cm, Fowler-Nordheim tunneling significantly reduces
the expected failure times. For this reason, extrapolation of mean-time to failure at low fields must
be performed by datapoints measured at lower electric fields.
675