Materials Science Forum Vols. 556-557

Abstract: The deposition and annealing in ultra high vacuum (UHV) of 5-6 monolayers (ML) of cerium on clean reconstructed Si-face 4H-SiC (0001) is studied by x-ray photoemission spectroscopy (XPS). Band bending as a function of annealing was studied by shifts of the bulk peak contribution in the C1s and Si2p spectra relative to the clean reconstructed surface. Additional datapoints for Schottky barrier formation on 4H-SiC are thus obtained by the low work function rareearth metals, and presented in the framework of the metal-induced-gap states and electronegativity model. A Ce/CeSi2-x/4H-SiC interface alloy forms by annealing to 850-1050oC. Kinetic information from the oxidation of the Ce/CeSi2-x/4H-SiC interface alloy is also reported. In particular, a SiO2- x/Ce-Si mixed oxide/4H-SiC forms upon oxidation. The shift of the C1s SiC-bulk-peak towards higher binding energies upon oxidation indicates that the mixed Ce-Si oxide interface layer appears to passivate the near Fermi-level 4H-SiC interface states at least as well as SiO2, and are expected to modify the electrical interface characteristics.

Abstract: In n-type 4H-SiC, over-oxidation of an implanted surface-near, Gaussian nitrogen-profile results in MOS capacitors, which possess a distinctly reduced density of interface states Dit and an undesirable large negative flatband voltage UFB. Their values are determined by the implantation parameters and the thickness of the oxide layer. The negative flatband voltage can strongly be compensated in the case that a Gaussian aluminum-profile is co-implanted prior to the oxidation. Depending on the conditions of the Al implantation, UFB can be controlled within a wide range. Secondary ion mass spectrometry analyses reveal that the implanted N and Al atoms are mobile in the oxide layer during the oxidation process and are partly accumulated at the SiC/SiO2 interface.

Abstract: With the aim to set a starting point for future investigations on the relevance of the heating ramp on the annealing of ion implanted SiC, a review study is presented here. This study focuses on the heating rate of different annealing setups and presents results that highlight the relevance of the heating ramp on the morphological, structural and electrical properties of ion implanted <0001> 4H- and 6H-SiC. The post-implantation annealing results of hot and room temperature implanted SiC are so different that their presentation is kept distinct.

Abstract: Low resistance p-layers are achieved in this paper using a graphite cap to protect SiC surface from out-diffusion of Si during high temperature post-implantation annealing, which is carried out to maximize the activation of Al dopant in 4H-SiC. With a graphite layer converted from photoresist, as high as 1700 and 1800oC post-implantation annealing is able to be used. Low RMS roughness of surface after high temperature annealing shows the effectiveness of the graphite cap. Small sheet resistance and resistivity are also achieved from the high temperature annealing. At room temperature, sheet resistances of 9.8 and 1.3 k
/□, and the corresponding resistivities of 235 and 31 m
-cm are obtained from 1700 and 1800oC annealed samples, respectively. The Al ionization energy extracted from Arrhenius plot is also close to the typical reported values. Therefore, it can be concluded that, using graphite cap could help to activate the Al dopant effectively during high temperature annealing.

Abstract: The surface morphology and the electrical activation of P+ implanted 4H-SiC were investigated with respect to annealing treatments that differ only for the heating rate. P+ implantation was carried out in lightly doped n-type epitaxial layers. The implantation temperature was 300 °C. The computed P profile was 250 nm thick with a concentration of 1×1020 cm-3. Two samples underwent annealing at 1400 °C in argon with different constant ramp up rates equal to 0.05° C/s and 40 °C/s. A third sample underwent an incoherent light Rapid Thermal Annealing (RTA) at 1100 °C in argon before the annealing at 1400 °C with the lower ramp rate. The ramp up of the RTA process is a few hundred degrees per second. Atomic Force Microscopy (AFM) micrographs pointed out that the surface roughness of the samples annealed at 1400 °C increases with increasing heating rate and that the critical temperature for surface roughening is above 1100 °C. Independently on the annealing cycle, Scanning Capacitance Microscopy (SCM) measurements showed that the P profiles are uniform over the implantation thickness and have plateau concentration around 9×1018 cm-3 in all the implanted samples. The fraction of P atoms activated as donors is 13% of the total implanted fluence.

Abstract: 4H-SiC samples implanted with 1020 Al were annealed at various temperatures with a BN/AlN or graphite cap, and there morphological, structural, and electrical properties are compared. No blow holes were observed in either cap. Some Si out-diffuses through the graphite cap which results in a rougher surface and a structurally modified region near the surface. The BN/AlN cap annealed at 1800°C cannot be readily removed, whereas the graphite cap can be removed easily after any annealing temperature. The sheet resistances for both types of samples were about the same.

Abstract: The electrical properties of N ion implanted 3C-SiC(100) have been investigated by means of Hall effect measurement. The p-type epitaxial layer grown on n+ substrate is multiply implanted with N ions with energy ranging from 15 to 120 keV at a total dose of 2.4×1015 cm-2 at room temperature, which corresponds to the doping layer with a N concentration of 1×1020 cm-3 and a thickness of 250 nm. The implanted sample is annealed by RF inductive heating annealer at temperature ranging from 1000 to 1500 oC for 10 min in Ar gas flow. The sample annealed at 1000 oC shows the sheet resistance of 1 k./sq. The sheet resistance of the implanted sample is decreased with the increase of annealing temperature. The sample annealed at 1500 oC shows the sheet resistance of 81 ./sq. and the sheet carrier concentration of 1.6×1015 cm-2. The electrical activity of implanted N impurity is estimated to be 68 %, which is much larger than that of N ion implanted 4H-SiC (about 0.9 %). The higher electrical activity of implanted N impurity is attributed to the shallower donor level than that in 4H-SiC.

Abstract: The encapsulating annealing of N+ implanted 4H-SiC(0001) is performed using diamondlike- carbon (DLC) films for the suppression of surface roughening. 4H-SiC(0001) sample with an off-orientation of 8o is multiply implanted by N+ with energy ranging from 15 to 120 keV at a total dose of 2.4×1015 cm-2 at room temperature. DLC films with thickness ranging from 0.3 to 1.8 μm are deposited on the surface of implanted sample using plasma-based ion implantation equipment with C2H4 gas. The DLC capped sample is annealed at 1500 oC for 5 min using IR image annealer. After annealing, DLC film is removed by the oxidization. The sample capped by DLC film with a thickness of 0.3 μm shows the root mean square (RMS) surface roughness of 0.6 nm while the annealed sample without DLC film shows RMS surface roughness of 5.2 nm. As the thickness of DLC film is increased from 0.3 to 1.8 μm, the RMS surface roughness is decreased from 0.6 to 0.2 nm.

Abstract: The influence of the implantation temperature on the surface roughness and the resistivity of aluminum implanted 4H-silicon carbide was determined. A dose of 1.2 ⋅1015cm-2 aluminum ions was implanted at temperatures between room temperature and 1000°C. A decrease of the surface roughness down to an rms-value of 12nm and a decrease in the resistivity down to 0.35Wcm were found with increasing implantation temperature. The influence of the implantation temperature on the resistivity was identified by modeling temperature dependent resistivity data. The results showed an increase in mobility with temperature due to the reduction of compensation centers.