Silicon Carbide and Related Materials 2006

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Authors: Huang De Lin, Galyna Melnychuk, Jeffery L. Wyatt, Yaroslav Koshka
Abstract: Low-temperature epitaxial growth of 4H-SiC with CH3Cl carbon precursor was further developed. In-situ doping with nitrogen and aluminum was investigated. The nitrogen concentration in epitaxial layers grown on the C face was almost two orders of magnitude higher than that in the Si-face epilayers grown in the same growth run at 13000C. The opposite trend was observed for intentional aluminum doping, with more than an order of magnitude higher aluminum concentration incorporated in Si-face epilayers. High values of nitrogen and aluminum doping well in excess of 1020 cm-3 without any obvious epilayer morphology degradation can be achieved on C-face and Siface respectively. Addition of HCl during halo-carbon growth at 13000C resulted in drastic improvement of the surface morphology. Also, a significant increase of the growth rate took place confirming that the improvement in the epilayer morphology during HCl-assisted growth is predominantly related to silicon cluster etching by additional Cl-containing vapor species.
Authors: Lucia Calcagno, Gaetano Izzo, Grazia Litrico, G. Galvagno, A. Firrincieli, Salvatore di Franco, Marco Mauceri, Stefano Leone, Giuseppe Pistone, Giuseppe Condorelli, F. Portuese, Giuseppe Abbondanza, Gaetano Foti, Francesco La Via
Abstract: High growth rate of 4H-SiC epitaxial layers can be reached with the introduction of HCl in the deposition chamber. The effect of the Cl/Si ratio on this epitaxial growth process has been studied by optical and electrical measurements. Optical microscopy shows an improvement of the surface morphology and luminescence measurements reveal a decrease of epitaxial layer defects with increasing the Cl/Si ratio in the range 0.05–2.0. The leakage current measured on the diodes realized on these wafers is reduced of an order of magnitude and DLTS measurements show a decrease of the EH6,7 level concentration in the same range of Cl/Si ratio. The value Cl/Si=2.0 allows to grow epitaxial layers with the lowest defect concentration.
Authors: L.B. Rowland, Greg Dunne, Jody Fronheiser, Stanislav I. Soloviev
Abstract: Cold-wall vapor phase epitaxy was utilized to grow uniform 4H-SiC layers with abrupt doping interfaces on 4o off-axis substrates. Concentrations of Al were reduced roughly 200x after 0.1 μm of epitaxy after trimethylaluminum flow was stopped. Thickness uniformity of cold-wall epitaxy across 3” wafers was as good as 3.2%. Minority carrier diffusion lengths of 27 μm-thick 4H-SiC epitaxy grown in a cold-wall design were as high as 58 μm.
Authors: Jian Wei Wan, Mark J. Loboda, Mike F. MacMillan, Gil Yong Chung, E.P. Carlson, V.M. Torres
Abstract: A SiC epitaxy process based on chlorosilane/propane chemistry has been successfully transferred from a single-wafer R&D system to a multi-wafer CVD reactor. The optimized process results in very smooth epi surface (RMS~0.24nm) and minimum surface pits (less than 0.5/cm2). Both n-type and p-type doping in a wide range are demonstrated using nitrogen and aluminum, respectively. The high performance benchmarks for thickness uniformity (intra-wafer variation <1% and inter-wafer variation <1%) and doping uniformity (intra-wafer variation <6% and inter-wafer variation <3%) are achieved on 5 x 3-inch wafers. The carrier lifetime in these epilayers measured by μ-PCD is over 5 μs, the longest value reported so far for SiC epitaxial wafers.
Authors: Bharat Krishnan, Hrishikesh Das, Huang De Lin, Yaroslav Koshka
Abstract: Previously reported CVD epitaxial growth of 4H-SiC at temperatures down to and below 13000C using CH3Cl precursor offered a promise of new device applications that could benefit from lower-temperature growth process. In this work, selective epitaxial growth (SEG) of 4H-SiC mesas using conventional SiO2 low temperature mask is reported. Virtually no nucleation on the mask could be observed after SEG at 13000C. The mask could be easily removed after the growth, with no degradation of the surface of SiC substrate under the mask. For the growth conditions that normally resulted in growth rate of 2 /m/hr and defect-free epilayer morphology during regular full-wafer (non-SEG) epitaxy, the epilayer morphology during SEG was significantly degraded by the appearance of oriented triangular defects, while the growth rate increased more than three times in comparison to the blanket epitaxial growth due to the loading effect. The growth at optimized growth conditions and lower growth rate resulted in significant reduction of the surface defects, making this approach promising for obtaining device-quality mesas. The crystal quality of the mesas, defects at the mesa walls, formation of facets during SEG, and other effects are reported.
Authors: Chi Kwon Park, Gi Sub Lee, Ju Young Lee, Myung Ok Kyun, Won Jae Lee, Byoung Chul Shin, Shigehiro Nishino
Abstract: A sublimation epitaxial method, referred to as the Closed Space Technique (CST) was adopted to produce thick SiC epitaxial layers for power device applications. In this study, we aimed to systematically investigate surface morphologies and electrical properties of SiC epitaxial layers grown with varying a SiC/Al ratio in a SiC source powder during the sublimation growth using the CST method. It was confirmed that the acceptor concentration of epitaxial layer was continuously decreased with increasing the SiC/Al ratio. The blue light emission was successfully observed on a PN diode structure fabricated with the p-type SiC epitaxial layer. Furthermore, 4H-SiC MESFETs having a micron-gate length were fabricated using a lithography process and their current-voltage performances were characterized.
Authors: Francesco La Via, Stefano Leone, Marco Mauceri, Giuseppe Pistone, Giuseppe Condorelli, Giuseppe Abbondanza, F. Portuese, G. Galvagno, Salvatore di Franco, Lucia Calcagno, Gaetano Foti, Gian Luca Valente, Danilo Crippa
Abstract: The growth rate of 4H-SiC epi layers has been increased by a factor 19 (up to 112 μm/h) with respect to the standard process with the introduction of HCl in the deposition chamber. The epitaxial layers grown with the addition of HCl have been characterized by electrical, optical and structural characterization methods. An optimized process without the addition of HCl is reported for comparison. The Schottky diodes, manufactured on the epitaxial layer grown with the addition of HCl at 1600 °C, have electrical characteristics comparable with the standard epitaxial process with the advantage of an epitaxial growth rate three times higher.
Authors: Alexander A. Lebedev
Abstract: In addition to possessing unique electrical properties, silicon carbide (SiC) can crystallize in different modifications (polytypes). Having the same chemical nature, SiC polytypes may significantly differ in their electrical parameters. In recent years, the world's interest in fabrication and study of heteropolytype structures based on silicon carbide has considerably increased. This paper considers studies concerned with fabrication of various types of heterostructures constituted by different SiC polytypes by sublimation epitaxy, and their electrical parameters. It is shown that heterostructures between SiC polytypes may have a better structural perfection than those constituted by semiconductors that differ in chemical nature. A conclusion is made that SiC-based heterostructures are promising for application in modern electronic devices.
Authors: A.V. Vasin, Yukari Ishikawa, Noriyoshi Shibata, Jarno Salonen, Vesa Pekka Lehto
Abstract: In the present work, the carbonization of porous silicon for the subsequent 3C-SiC growth has been systematically studied. The effect of temperature and acetylene flow-rate on the chemical state of the surface and structure relaxation was studied. It was found that the porous nano-crystalline morphology is unstable and tends to recrystallize in temperature range typical of 3C-SiC growth on Si (10000C-13000C). The carbonization impedes recrystallization at 10000C, but at 13000C the full recrystallization takes place. Pyrolytic amorphous graphite-like carbon was found on porous silicon carbonized at temperature and with acetylene flow-rate above critical values.
Authors: Andrea Severino, Corrado Bongiorno, Stefano Leone, Marco Mauceri, Giuseppe Pistone, Giuseppe Condorelli, Giuseppe Abbondanza, F. Portuese, Gaetano Foti, Francesco La Via
Abstract: 3C-SiC/Si heteroepitaxy is hampered by large mismatches in lattice parameters (19.7%) and thermal expansion coefficient (8%) leading to 3C-SiC films containing high defects density. To reduce the presence of defects, a multi-step growth process in a CVD reactor is used. The aim of the work is to study the effect of carbonization on differently oriented Si surfaces, experiencing a 200°C-wide temperature range in a CVD reactor, to improve the crystalline quality. TEM analysis are carried out to evaluate thickness, crystal orientations and defects of carbonized layers with respect to the time-dependence of the process and to the different orientations of the Si substrate. It will be shown that process-related defects are strictly correlated to the substrate orientation either for size, density, occupied area, shape or thickness. Uniform, flat and crystalline thin SiC films are obtained with a low defect density.

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