Materials Science Forum
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Materials Science Forum
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Materials Science Forum Vols. 778-780
Paper Title Page
Abstract: Super-junction (SJ) devices have been developed to improve the trade-off relationship between the blocking voltage (VBD) and specific on-resistance in unipolar power devices. This SJ structure effect is expected in SiC unipolar devices. Multi-epitaxial growth is a known fabrication method for SJ structures where epitaxial growth and ion implantation are repeated alternately until a certain drift-layer thickness is achieved. In this study, we fabricated two types of test elemental groups with an SJ structure to evaluate the breakdown voltage (VBD) and specific resistivity of the drift layer (Rdrift). Experimental results show that VBD exceeded the theoretical limit of the 4H-SiC by 300V, and Rdrift agreed well with the estimated value from the device simulation. The beneficial effects of the SJ structure in the SiC material on VBD and Rdrift were confirmed for the first time.
845
Abstract: In this paper, we found origin of VF degradation of SiC bipolar devices other than a basal plane dislocation (BPD) in the SiC substrate. A VF degradation of the 4H-SiC PiN diodes with low-BPD wafers was evaluated and its origins were discussed. Some diodes suffered VF degradation, even though they were fabricated on BPD-free area. PL mapping, TEM image, and optical observation after KOH etching showed that there were Shockley stacking faults and combined etch-pits arrays, which were presumed to be caused by the device process.
851
Abstract: We successfully fabricated 13-kV, 20-A, 8 mm × 8 mm, drift-free 4H-SiC PiN diodes. The fabricated diodes exhibited breakdown voltages that exceeded 13 kV, a forward voltage drop of 4.9–5.3 V, and an on-resistance (RonAactive) of 12 mW·cm2. The blocking yield at 10 kV on a 3-in wafer exceeded 90%. We investigated failed devices using Candela defect maps and light-emission images and found that a few devices failed because of large defects on the chip. We also demonstrated that the fabricated diodes can be used in conducting high-voltage and high-current switching tests.
855
Abstract: Excess currents and defects were investigated in the 4H-SiC p+nn+ structures created by implantation. It was found that the principal p+n junction is shunted by several or multiple Schottky barriers connected in parallel to the principal pn junction and formed by a contact of Al on the surface of p+-layer with n-layer perhaps with participation of carbon coated surfaces of the pits or other defects. Amount and area of Schottky barriers vary for different pn structures, in connection with which vary as the value of the excess current and character of the current-voltage dependence, and, apparently, that was observed in some cases, the instability of excess current.
859
Abstract: High-resolution cryogenic performance testing is carried out on 4H-SiC PiN and Schottky diodes. At 2K intervals from 20 to 320K, current-voltage tests are performed to extract static characteristics such as turn-on, ideality factor and barrier height from across the temperature range. We also analyse the performance of the diodes within a low current/voltage switching circuit across the same temperature range using an inductive switching setup. Both diodes suffer markedly increased conduction losses at the lower temperatures, the PiN diode losing all the benefits of conductivity modulation as dopant freezes-out, reducing its series resistance. However, minor gains in the total switching losses are expected at low temperature due to faster switching speeds.
863
Abstract: Recent availability of large SiC wafer with reduced density of defects and maturity of our fabrication process permitted to fabricate 15A-5kV W-JBS (25 mm2) and 15A-5kV PiN (10 mm2) diodes on 4 wafers. We will present and compare their static characteristics. Several W-JBS diodes have been packaged and switched at 2.5kV to study their reverse recovery and demonstrate the major advantages of the SIC-JBS devices at high voltage.
867
Abstract: This paper presents for the first time a 650V SiC JFET switch. Although this application class is highly competitive and occupied by Silicon devices the characterization data show unique features which make the SiC switch an outstanding option for future system integration.
871
Abstract: A gate-drive voltage for a normally-off silicon-carbide vertical-trench junction-gate field-effect transistor (JFET) was designed for a server power supply with 94% efficiency. Since the on-state resistance of the JFET is strongly depends on the gate voltage and a large gate-leakage current between the gate electrode and source flows by applying an excessively high-gate voltage, we therefore must set an adequate turn-on gate-drive voltage to suppress the increase in power loss. The optimum gate-drive voltage design was estimated to be 2.1 V, resulting in a high efficiency of 94% even with a gate-drive voltage variation of ±0.3 V.
875
Abstract: This paper evaluates the static and dynamic characteristics of a 1.2kV SiC stack-cascode at junction temperatures (Tj) up to 200°C. The experimental results show that, at Tj = 200°C, the SiC stack-cascode can be switched stably under a 600V-17A inductive load condition and can withstand an avalanche current of 13A for 9μs (Eav = 116mJ) for a 1.5mH load inductor. The SiC stack-cascode has no degradation in on-resistance, threshold voltage and blocking characteristics after 80 hours HTRB reliability test at 200°C ambient. These promising experimental results indicate the possibility of the SiC stack-cascode for reliable 200°C operations.
879
Abstract: Utilizing a high power discrete SiC-JFET developed by KEK, a switching power supply (SPS) that had a circuit topology of H-bridge was designed and constructed to drive the induction acceleration system for the KEK digital accelerator. Following the hopeful result with a resistive dummy load, the SPS was installed in the actual KEK Digital Accelerator system. Consequently, heavy ion beam acceleration was successfully demonstrated. Moreover, we have started to develop a next generation package for a high voltage SiC-JFET, which has the voltage rating of 2.4 kV. Two in one module construction, bonding wire free connection, and bidirectional thermal flowing are included in the design concept of the new package.
883