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Ultra Clean Processing of Silicon Surfaces VII

Solid State Phenomena Volumes 103 - 104

• Papers
• Abstracts

• p3 High-k Gate Dielectrics on Silicon and Germanium: Impact of Surface Preparation   [ 162 K ]
  Authors: Alessio Beverina, H. Shang, M.M. Frank, S. Rivillon, F. Amy, C.L. Hsueh, V.K. Paruchuri, R.T. Mo, M. Copel, E.P. Gusev, M.A. Gribelyuk, Y.J. Chabal
• p7 UV Activated Surface Preparation of Silicon for High-k Dielectric Deposition   [ 78 K ]
  Authors: Casey C. Finstad, Anthony Muscat
• p11 Enhanced Surface Preparation Techniques for the Si/High-k Interface   [ 16 M ]
  Authors: Joel Barnett, Chadwin D. Young, Naim Moumen, Gennadi Bersuker, Jeff J. Peterson, George A. Brown, Byoung Hun Lee, Howard R. Huff
• p15 Uniform Ultrathin Oxide Growth for High-k Preclean   [ 191 K ]
  Authors: Jeffery W. Butterbaugh, Steven L. Nelson, Thomas J. Wagener
• p19 On the Application of a Thin Ozone Based Wet Chemical Oxide as an Interface for ALD High-k Deposition   [ 251 K ]
  Authors: Bart Onsia, M. Caymax, Thierry Conard, Stefan De Gendt, F. De Smedt, A. Delabie, C. Gottschalk, M. Green, Marc M. Heyns, S. Lin, Paul W. Mertens, W. Tsai, Chris Vinckier
• p23 Interface State Densities and Surface Charge on Wet-Chemically Prepared Si(100) Surfaces   [ 209 K ]
  Authors: H. Angermann
• p27 A Study of the Influence of Typical Wet Chemical Treatments on the Germanium Wafer Surface   [ 16 M ]
  Authors: Bart Onsia, Thierry Conard, Stefan De Gendt, Marc M. Heyns, I. Hoflijk, Paul W. Mertens, Marc Meuris, G. Raskin, Sonja Sioncke, I. Teerlinck, Antoon Theuwis, Jan Van Steenbergen, Chris Vinckier
• p31 Surface Preparation Techniques for High-k Deposition on Ge Substrates   [ 525 K ]
  Authors: Sven Van Elshocht, A. Delabie, B. Brijs, M. Caymax, Thierry Conard, Bart Onsia, Riikka Puurunen, Olivier Richard, Jan Van Steenbergen, Chao Zhao, Marc Meuris, Marc M. Heyns
• p37 Advanced Surface Cleaning Strategy for 65nm CMOS Device Performance Enhancement   [ 662 K ]
  Authors: F. Arnaud, H. Bernard, Alessio Beverina, R. El-Farhane, B. Duriez, Kathy Barla, Didier Lévy
• p41 Process, Environmental & Economical Considerations to Implement Single Wafer Cleaning Tools in 300mm Wafer Fabs   [ 41 K ]
  Authors: Philippe Garnier, G. Horellou, J.J. Calvier, D. Labaty, Didier Lévy