Calculation of the Whole Interface State Density Profile in SiO2/SiC Lateral MOSFETs

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Silicon carbide (SiC) has emerged as a leading material for high-power applications. However, the high density of interface states (Dit) at the SiO2/SiC interface still constrains the performance and reliability of MOSFET devices. In this work, lateral 4H-SiC MOSFETs subjected to post-deposition annealing (PDA) in nitric oxide (NO) of different durations were investigated through capacitance-voltage measurements, supported by an analytical model and an iterative MATLAB-based Dit extraction algorithm. The results demonstrate that NO PDA effectively reduces Dit not only near the conduction band edge but also towards the valence band, yielding improved channel mobility (µFE) and enhanced threshold voltage stability.

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May 2026

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