Critical Technical Issues in High Voltage SiC Power Devices

Abstract:

In this paper, we review the state of the art of SiC switches and the technical issues which remain. Specifically, we will review the progress and remaining challenges associated with SiC power MOSFETs and BJTs. The most difficult issue when fabricating MOSFETs has been an excessive variation in threshold voltage from batch to batch. This difficulty arises due to the fact that the threshold voltage is determined by the difference between two large numbers, namely, a large fixed oxide charge and a large negative charge in the interface traps. There may also be some significant charge captured in the bulk traps in SiC and SiO2. The effect of recombination-induced stacking faults (SFs) on majority carrier mobility has been confirmed with 10 kV Merged PN Schottky (MPS) diodes and MOSFETs. The same SFs have been found to be responsible for degradation of BJTs.

• Periodical: Materials Science Forum (Volumes 600-603)
• Pages: 895-900
• DOI: https://doi.org/10.4028/www.scientific.net/MSF.600-603.895
• Online since: September 2008
• Authors: Anant K. Agarwal, Albert A. Burk, Robert Callanan, Craig Capell, Mrinal K. Das, Sarah K. Haney, Brett A. Hull, Charlotte Jonas, Michael J. O'Loughlin, Michael O`Neil, John W. Palmour, Adrian R. Powell, Jim Richmond, Sei Hyung Ryu, Robert E. Stahlbush, Joseph J. Sumakeris, Q. Jon Zhang
• Keywords: Bipolar Junction Transistor (BJT), GTO, High Voltage (HV), Insulated Gate Bipolar Transistor (IGBT), Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET), Power Device, Stacking Fault

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