Solid State Phenomena Vols. 124-126

Abstract: Silicone dioxide (SiO2) layer as an electrical insulator and diffusion barrier was deposited on a flexible stainless steel substrate by plasma enhanced CVD process. And we deposited Mo/Na-doped Mo bi-layer back contact on the oxide layer in order to supply Na into the CIGS absorber. Then we deposited CIGS layer by three-stage process using elemental co-evaporation method and completed the solar cell fabrication. Without antireflection coating, the best CIGS solar cell on the stainless steel showed the conversion efficiency of 10.57 % with Jsc = 33.38 mA/cm2 and Voc = 0.519 V and FF = 0.61 for an active area of 0.45 cm2.

Abstract: ZnO nanowalls and nanocolumns were synthesized on Si3N4 (50 nm)/Si (001) substrates at low growth temperature (350 and 400 oC) by metalorganic chemical vapor deposition (MOCVD) with no metal catalysts. ZnO nanowalls with extremely small wall thicknesses below 10 nm and nanocolumns with diameters over 100 nm were formed on the Si3N4/Si substrates relying on MOCVD-growth temperature. It was found that ZnO nanowalls have a strong c-axis preferred orientation with a hexagonal structure, while ZnO nanocolumns have a weak c-axis preferred orientation with broken stacking orders in synchrotron x-ray scattering experiments. In addition, strong free-exciton emission from the ZnO nanowalls was clearly observed in photoluminescence measurements. On the other hand, we could not observe any emission bands from the ZnO nanocolumn samples.

Abstract: In this study, the dependence of Pd/GaAs Schottky diode on the electroless plating (EP) variable is systematically studied. Both alkaline and acidic formulas for electroless Pd depositions are employed for investigations. The correlation between Pd gain size and the manipulation of plating bath composition is constructed. Experimental results show that the performances of Pd/GaAs Schottky diode, electric rectification and hydrogen detection, are largely governed by the Pd grain size. Furthermore, without the interference of sodium ion, the acidic-plated Pd/GaAs diode with intermediate oxide layer exhibits the excellent hydrogen sensing performances from 15 ppm to 1.0 % H2/air.

Abstract: This paper discusses about thermal performance of high power light emitted diode (HPLED) implemented with sintered metal wick type heat pipe(SWHP). The HPLED(2.5 W) samples were surface mounted device(SMD) package used in our experiments. The experiments were made for SWHP with diameters of 6.0 mm. The length of the SWHP is 150 mm. The working fluid in the heat pipes is pure water. The electrical-thermal transient technique was employed for the junction temperature measurement. It was found that the SWHP leads to decreased of thermal resistance by 35 % compared with a simple copper bar in oil bath (forced cooling condition). Employment of copper cap as a LED attachment was more advantageous over the phosphor bronze. After the increase of input power, the thermal resistance of HPLED package has decreased with the increase of effective thermal conductivity of SWHP.

Abstract: Capacitance-voltage (C-V) and Deep-level transient spectroscopy (DLTS) measurements on AlxGa1-xN/GaN heterostructures were performed to investigate the existence of the carriers and the behavior of the deep levels in the AlxGa1-xN/GaN heterointerface. The C-V depth profile showed that the carrier concentration existed at the AlxGa1-xN/GaN heterointerface was 4 × 1012 cm2. The DLTS results showed two deep levels. The capture cross-section of the deep level related to the two-dimensional electron gas decreased with increasing depth, resulting from the existence of the different deep levels in each region.

Abstract: The X-ray diffraction (XRD) pattern for the ZnO films grown on Si (100) substrates indicates that the grown ZnO films have a strong c-axis orientation. The pole figure indicates that ZnO thin films have columnars with the grains of the [0002] crystallographic axis perpendicular to the Si (100) substrate, indicative of the random rotational orientations along the c-axis. Selected area electron diffraction pattern (SADP) of the ZnO/Si (100) heterostructures shows that the ZnO preferential oriented film is formed on the Si substrate. A possible atomic arrangement of the crystal structure and the formation mechanism of the c-axis orientated ZnO thin films grown on p-Si substrates are discussed on the basis of the XRD, the pole figure, and SADP results.

Abstract: A reliable fabrication method for providing close spacing between the emitter mesa and the base contact metal of InP-based heterojunction bipolar transistor is disclosed. The silicon nitride sidewall was formed on the emitter electrode and mesa periphery. It was used as a mask for emitter mesa etching and also as an overhang to self-align the base contact with respect to the emitter mesa. The self-aligned device fabricated by this technique exhibited better high-frequency performances with fT of 138 GHz and fmax of 143 GHz, respectively, superior to the re-aligned one on the same epitaxy wafer.

Abstract: ZnO semiconductor has a wide band gap of 3.37 eV and a large exciton binding energy of 60 meV, and displays excellent sensing and optical properties. In particular, ZnO based 1D nanowires and nanorods have received intensive attention because of their potential applications in various fields. We grew ZnO buffer layers prior to the growth of ZnO nanorods for the fabrication of the vertically well-aligned ZnO nanorods without any catalysts. The ZnO nanorods were grown on Si (111) substrates by vertical MOCVD. The ZnO buffer layers were grown with various thicknesses at 400 °C and their effect on the formation of ZnO nanorods at 300 °C was evaluated by FESEM, XRD, and PL. The synthesized ZnO nanorods on the ZnO film show a high quality, a large-scale uniformity, and a vertical alignment along the [0001]ZnO compared to those on the Si substrates showing the randomly inclined ZnO nanorods. For sample using ZnO buffer layer, 1D ZnO nanorods with diameters of 150-200 nm were successively fabricated at very low growth temperature, while for sample without ZnO buffer the ZnO films with rough surface were grown.

Abstract: Ti/4H-SiC Schottky barrier diodes were fabricated under 500, 750, 1000 °C thermal treatment conditions. After the heat treatment at 750 °C, formation of TiC(111) and Ti5Si3(210) phases was confirmed by XRD analysis. Formation of Ti carbide and silicide phase increased breakdown voltage VB from 545 V to 830 V. An improvement of breakdown voltage (VB) was observed in case of the thermal treatment in nitrogen ambient at 750 °C for 2 min. Ideality factor (n), specific on resistance (Ron), and Schottky barrier height (Φb) were 1.04, 2.7 m-cm2, 1.33 eV respectively.

Abstract: 4H-SiC planar MESFETs were fabricated using ion-implantation on high-purity semi-insulating substrate, and their DC and RF performances were characterized. A modified RCA method was used to clean the substrate before each procedure. Sacrificial oxide was grown after channel layer etching to eliminate plasma damage to the gate region. A thin, thermal oxide layer was grown to passivate the surface and then a thick field oxide was deposited by CVD. The maximum oscillation frequency of 26.4 GHz and the cut-off frequency of 7.2 GHz were obtained. The power gain was 8.4 dB and the output power was 2.8 W/mm at 2 GHz.