Silicon Carbide and Related Materials 2005

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Authors: J.R. Grim, Marek Skowronski, W.J. Everson, V.D. Heydemann
Abstract: The selectivity, material removal rate, and the residual subsurface damage of colloidal silica (CS) chemi-mechanical polishing (CMP) of silicon carbide substrates was investigated using atomic force microscopy (AFM) and plan view transmission electron microscopy (TEM). Silica CMP, in most process conditions, was selective. In the damage region surrounding remnant scratches, the vertical material removal rate exceeded the planar material removal rate, which resulted in an enhancement of the scratches over the duration of the polishing process. The material removal rate was low, about 20 nm / hr. In addition, the selectivity leads to a slow removal of residual subsurface damage from mechanical polishing. The silica CMP polished surface exhibits significant subsurface damage observed by plan view TEM even after prolonged polishing of 16 hours.
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Authors: Peter Kuo, Ian Currier
Abstract: Chemical-mechanical polishing (CMP) has proven a powerful tool for the final polishing of semiconductor and compound semiconductor substrates such as silicon, sapphire, gallium arsenide, and indium phosphide. For these materials, conventional CMP techniques have been able to produce removal rates of several μm/hr while achieving pristine, epi-ready surfaces with subsurface damage less than 10[nm]. For certain materials of interest in the compound semiconductor community, particularly silicon carbide (SiC) and the III-V nitrides, conventional CMP techniques perform poorly. These materials are extremely chemically inert, negating the desired chemical effect leading to removal rates of less than 0.1[μm/hr]. These materials are also very brittle and take damage easily, so a significant amount of material must be removed to ensure a sufficiently low subsurface damage for epitaxy. This paper documents the improvements made in the CMP of 4H and 6H SiC by augmenting a colloidal silica slurry with chemical additives and with special treated nano size diamond particles. The chemical additives proved most effective on 4H SiC, enhancing the slurry’s chemical effect and improving its removal rate. For both materials, the addition of the diamond (Chemical-Mechanical Polish with Diamond, CMP-D) greatly enhanced the removal rate and provided strong synergy between mechanical strain and chemical effect resulting in low subsurface damage.
1099
Authors: J. Dunning, Xiao An Fu, Mehran Mehregany, Christian A. Zorman
Abstract: This paper details the characterization of polycrystalline SiC (poly-SiC) thin films deposited by low pressure chemical vapor deposition. Films were deposited on both Si and SiO2- coated Si substrates using dichlorosilane (SiH2Cl2) and acetylene (C2H2) as precursor gases. Low residual tensile stress films were deposited at 900°C at a pressure of 2 Torr using SiH2Cl2 and C2H2 (5% in H2) flow rates of 35 sccm and 180 sccm, respectively. XRD analysis of these films indicated a (111) 3C-SiC orientation regardless of substrate material. Both resistivity (1.3 -cm) and residual stress gradient (17 MPa/μm) were found to be relatively low and decreased as the film thickness increased. Unintentional nitrogen doping is responsible for the low resistivity measurements and its concentration in the films was about 1.86 x 1016 cm-3. Poly-SiC films exhibiting near-zero residual tensile stress, low stress gradient and relatively low resistivity have favorable properties for design and fabrication of MEMS devices.
1103
Authors: R. Panday, Xiao An Fu, Srihari Rajgopal, T. Lisby, S.A. Nikles, K. Najafi, Mehran Mehregany
Abstract: This paper explores polycrystalline 3C-silicon carbide (poly-SiC) deposited by LPCVD for fabricating flexible ribbon cable interconnects for micromachined neural probes. While doped silicon is used currently, we hypothesized that poly-SiC will provide enhanced mechanical robustness due to SiC’s superior mechanical properties. Paralleling prior work in silicon, forty-two different designs were fabricated from nitrogen-doped poly-SiC films deposited by LPCVD at 900°C using dichlorosilane and acetylene as precursors. The different designs were then tested in bending and twisting modes. Curved beams were found to bend nearly 250% more than straight beams before fracture. Longer beams withstood greater bending and twisting due to greater compliance. Longer and narrower beams generally outperformed shorter beams irrespective of design. Also, doped poly-SiC beams had, on average, breaking angles that were greater than those of identical doped silicon beams by ~50% in bending and ~20% in twisting modes. The paper details the designs studied, describes the fabrication process for the test structures and compares/contrasts the testing and simulation results related to the different designs to identify best design practices.
1107
Authors: Christian Förster, Volker Cimalla, M. Stubenrauch, Carsten Rockstuhl, Klemens Brueckner, Matthias A. Hein, Jörg Pezoldt, Oliver Ambacher
Abstract: In this paper the multifariousness of SiC/Si heterostructures for device and sensor applications will be demonstrated. 3C-SiC based microelectromechanical resonator beams (MEMS) with different geometries actuated by the magnetomotive effect operating under ambient conditions were fabricated. The resonant frequency reaches values up to 2 MHz. The applications of these resonators are the measurement of the viscosity of liquids or mass detection. Furthermore, photonic devices in the form of SiC/Si infrared gratings for wavelength and polarization filters in infrared spectra are processed. SiC wear protection for a dosing system with the possibility to dose nano- or picoliter droplets of water based liquids as well as SiC nanomasking for catalytic agent nanostructures are demonstrated.
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Authors: Laura J. Evans, Glenn M. Beheim
Abstract: High aspect ratio silicon carbide (SiC) microstructures are needed for microengines and other harsh environment micro-electro-mechanical systems (MEMS). Previously, deep reactive ion etching (DRIE) of low aspect ratio (AR ≤1) deep (>100 *m) trenches in SiC has been reported. However, existing DRIE processes for SiC are not well-suited for definition of high aspect ratio features because such simple etch-only processes provide insufficient control over sidewall roughness and slope. Therefore, we have investigated the use of a time-multiplexed etch-passivate (TMEP) process, which alternates etching with polymer passivation of the etch sidewalls. An optimized TMEP process was used to etch high aspect ratio (AR up to 13) deep (>100 *m) trenches in 6H-SiC. Power MEMS structures (micro turbine blades) in 6H-SiC were also fabricated.
1115
Authors: Konstantinos Zekentes, I. Zergioti, A. Klini, George Konstantinidis
Abstract: A 248 nm (KrF) excimer laser with a repetition rate of 10 Hz, pulse duration of 30 ns and beam energy up to 450 mJ was employed to form vias in 4H-SiC substrates and Lely platelets. SEM micrographs have been used to evaluate etched material quality as well as etch rate. The area surrounding the via-holes is covered by nanoparticles, which are debris from the laser ablation and are removed by chemical cleaning and agitation. The etch-rate exhibits a perfect linear behaviour versus the number of laser pulses showing the possibility of an all-laser via-hole formation. A slight tapering along the via-holes, useful for the subsequent metallization process is also observed. Finally, a defective,15 μm wide, zone is formed nearby the sidewalls.
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Authors: Mattias Südow, Kristoffer Andersson, Niklas Billström, Joakim Nilsson, Per Åke Nilsson, Niklas Rorsman, Johan Ståhl, Herbert Zirath
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Authors: John W. Palmour
Abstract: As SiC devices begin to become commercially available, it is becoming clear that electrical efficiency improvement is one of the key drivers for their adoption. For RF applications, SiC MESFETs have the ability to be easily linearized via digital pre-distortion to offer a 47% improvement in efficiency. In broadband WiMax applications, SiC MESFETs offer more than double the efficiency versus using GaAs MESFETs. SiC Schottky diodes are allowing up to a 25% reduction in losses in power supplies for computers and servers when used in the power factor correction circuit. For motor control, SiC Schottkys allow up to a 33% reduction in losses, as demonstrated for a 3 HP motor drive. Even higher efficiencies can be obtained when the Schottkys are combined with a SiC switch. A 400 W boost converter has been demonstrated using a SiC MOSFET and Schottky diode, operating at >200° C, with an extremely high efficiency of 98%. These improvements in electrical efficiency can have a significant impact in reducing overall electricity consumption worldwide, impacting virtually every aspect of electrical usage, ranging from information technology to motor control, with potential savings of $35 billion/yr.
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