Solid State Phenomena Vols. 103-104

Abstract: Fourier transform infrared (FTIR) spectroscopy, contact angle, and electrical measurements were used to study porous methylsilsesquioxane (p-MSQ) films (JSR LKD 5109) processed with alkylmonochlorosilanes having chain lengths of one to eighteen carbon atoms dissolved in supercritical carbon dioxide at 155-185 atm and 55-60°C to repair oxygen ashing damage. The FTIR results showed that all chemistries reacted with silanol groups on the surface of the pores producing covalent Si-O-Si bonds. Self-condensation between the alkylsilanols with chain lengths above four carbon atoms produced a physisorbed residue, which was partially removed after rinsing with pure scCO2. The hydrophobicity of the blanket p-MSQ surface was recovered, while the initial dielectric constant of 2.4 for the blanket p-MSQ surface was restored after treatment. With an increase in the length of the alkyl chain, the contact angle increased from 84° to 108° and the dielectric constant measured on metal-insulator-semiconductor capacitors was approximately constant in the range 2.4 ± 0.05. The monochlorosilanes restore the dielectric constant and surface properties of mesoporous p-MSQ and are candidate pore sealing additives.

Abstract: The compatibility of chemical solutions with different pH is studied on microporous silica-based (SiOCH) and mesoporous methylsilsesquioxane (MSQ) based low-k materials. The surface and bulk properties of as-deposited and O2/CF4 plasma-treated low-k films have been studied after several wet treatments.

Abstract: As device features scale down to 90nm and Cu/low-k films are employed for back end interconnects, post etch and ash residue cleaning becomes increasingly challenging due to the higher aspect ratio of the features, tighter CD control requirements, sensitivity of the low-k films, and the requirement for high wet etch selectivity between CuxO and Cu. Traditional solvent based cleaning in wet benches has additional issues such as wafer cross-contamination and high disposal cost [1, 2]. We have developed a novel aqueous solution (AQ) based single wafer cleaning process to address these challenges. The results of physical characterization, process integration electrical data, and process integration reliability data such as electromigration (EM) and stress migration data are presented. The main conclusions can be summarized as follows: (1) The single wafer cleaning process developed on the Oasis™ system can clean post etch residues and simultaneously clean the wafer front side and backside metallic contaminants; (2) In terms CuxO and Cu wet etch selectivity, CD loss control, the Oasis™ aqueous single wafer clean process is superior to the bench solvent cleaning process; (3)The Oasis aqueous cleaning process shows no undercut below etchstop due to the very low Cu etch amount in one cleaning pass, therefore the electromigration and stress migration performance of the aqueous Oasis processed wafers is clearly better than that of the solvent bench processed wafers.

Abstract: Interconnect RC delay is the limiting factor for device performance in submicron semiconductor technology. Copper and low-k dielectric materials can reduce this delay and have gained widespread acceptance in the semiconductor industry. The presence of copper interconnects provides unprecedented challenges for via cleaning technology and requires the development of novel process chemistries for improved device capability.