Materials Science Forum Vols. 679-680

Abstract: We investigated electrical properties of 4H-SiC trench metal-oxide-semiconductor field-effect transistors (MOSFETs) fabricated on (000_,1) C-face substrates with various off-axis angles. Off-axis angles and directions are 4o, 8o, and 15o towards [__,1120] and 8o towards [1_,100] directions. Most trench MOSFETs showed good on-state performance. Peculiar characteristics that field-effect mobility was 103 cm2/Vs in spite of a relatively high acceptor concentration of 1 × 1017 cm−3 in the channel region were observed for trench MOSFET on 15o-off substrates. From crystallographic analysis, this face is (11_,20) with 15o off towards [000_,1] direction. We can expect that this face has quite good MOS interface properties.

Abstract: Trenched implanted vertical JFETs (TI-VJFETs) with self-aligned gate and source contacts were fabricated on commercial 4H-SiC epitaxial wafers. Gate regions were formed by aluminium implantation through the same silicon oxide mask which was used for etching mesa-structures. Self-aligned nickel silicide source and gate contacts were formed using a silicon oxide spacer formed on mesa-structure sidewalls by anisotropic thermal oxidation of silicon carbide followed by anisotropic reactive ion etching of oxide. Fabricated normally-on 4H-SiC TI-VJFETs demonstrated low gate leakage currents and blocking voltages exceeding 200 V.

Abstract: In this paper, the integration of HfO2 onto SiC has been investigated via a number of different test structures. Capacitors consisting of HfO2 on Si, SiC, Si/SiC and SiO2/SiC have been fabricated and electrically tested. The new HfO2/Si/SiC capacitors provide the greatest breakdown electric field of 3.5 MV/cm, whilst leakage currents are minimised through the insertion of the narrow bandgap material. The Si layer, which is wafer bonded to the SiC, is proven to be stress free through Raman spectroscopy, whilst TEM and EDX prove that the interface is free of contaminants.

Abstract: The effect of using two different polytypes, 4H-SiC and 6H-SiC, on the performance of (0001) SiC MOSFETs has been studied. 4H-SiC and 6H-SiC MOSFETs have been fabricated with deposited gate oxides followed by oxidation in dry O2 or NO. Device parameters, particularly field-effect mobility, inversion sheet carrier concentration and Hall mobility have been extracted. We have also compared the mobility-limiting mechanisms of (0001) 4H and 6H-SiC MOSFETs and found that inversion mobility can be further improved in 4H-SiC, but not 6H-SiC.

Abstract: With a focus on pulsed power applications, this paper presents results of the pulse current characterization of GTO thyristors developed and fabricated within a previous ISL funded project. Limited by the pulse current capability of the bonding wire connection, the devices demonstrated to handle a peak current of up to 6 kA/cm2 (about 20 µs FWHM). Pulse tests of Al wires indicate that two 50 µm wires should be sufficient to test a 1 mm2 device up to a peak current of 30 kA/cm2.

Abstract: Vertical epitaxial NPN SiC BJTs for 1200 V rating were fabricated. Very low collector-emitter saturation voltages VCESAT=0.5 V at IC=6 A (JC=140 A/cm2) and T=25 °C and VCESAT=1.0 V at IC=6 A and T=250 °C were measured. The common emitter current gain at IC=6 A is 71 at T=25 °C and 32 at T=250 °C, respectively. A SPICE model was developed for the BJT including the parasitic capacitances of the internal pn junctions, as well as temperature dependence of the current gain and the collector series resistance. The IC-VCE characteristics of the BJT are in good agreement with the SPICE model between 25 °C and 250 °C. Fast switching measurements were performed showing a VCE voltage fall-time of 22 ns and a VCE voltage rise-time of 11 ns.

Abstract: Direct light triggering of 4H-SiC thyristors with a 365 nm UV LED was demonstrated. Two different structures with etched and non etched gate were successfully tested. The current rise time was less than 100 ns and the delay time as short as 1.5 μs. The optical energy density necessary to switch-on a thyristor has been studied for different optical power densities and bus voltages. This work shows that the UV LED technology is becoming sufficiently powerful to switch-on SiC thyristors. Thus, an alternative, less expensive and more compact gate light source than UV laser is now possible. This can be of particular interest for very high voltage and pulse power electronic applications.

Abstract: The impacts of threading dislocations, surface defects, donor concentration, and schottky Schottky barrier height on the reverse IV characteristic of silicon carbide (SiC) junction barrier schottky Schottky (JBS) diodes were investigated. The 100 A JBS diodes were fabricated on 4H-SiC 3-inch N-type wafers with two types of threading dislocation density. The typical densities are were 0.2×104 and 3.8×104 cm-2, respectively. The improvement of vIt was found that variations in the leakage current and the high yield of large area JBS diodes werecould be were obtained improved by using a wafer with a low threading dislocation density. In the range of low leakage current, the investigation shows showed a correlation between leakage current and threading dislocation density.

Abstract: We report the improvement of current gain in 4H-SiC bipolar junction transistors (BJTs) by using deposited oxides as a surface passivation layer. Various post-deposition annealing processes were investigated. We successfully demonstrated SiC BJTs with a high current gain (β) of 86 using deposited oxides annealed in NO. This is 70% higher current gain compared with that of BJTs with the same structure with conventional thermally-grown oxides.

Abstract: SiC BJTs are very attractive for high power application, but long term stability is still problematic and it could prohibit commercial production of these devices. The aim of this paper is to investigate the current gain degradation in BJTs with no significant degradation of the on-resistance. Electrical measurements and simulations have been used to characterize the behavior of the BJT during the stress test. Current gain degradation occurs, the gain drops from 58 before stress to 43 after 40 hours, and, moreover, the knee current shows fluctuations in its value during the first 20 hours. Current gain degradation has been attributed to increased interface traps or reduced lifetime in the base-emitter region or small stacking faults in the base-emitter region, while fluctuations of the knee current might be due to stacking faults in the collector region.