Materials Science Forum Vols. 679-680

Abstract: We report on electrical and physical investigations aimed to clarify the mechanisms behind the high channel mobility of 4H-SiC metal–oxide–semiconductor field-effect transistors processed with POCl3 annealing. By low-temperature capacitance–voltage analysis, we found that the shallow interface traps are effectively removed by P incorporation. Using x-ray photoelectron spectroscopy, we found that the three-fold coordinated P atoms exist at the oxide/4H-SiC interface. The overall results suggest that P atoms directly remove the Si–Si bonds and thus eliminate the near-interface traps.

Abstract: Surface and interface morphology of thermal oxides grown on 4-off (0001) oriented 4H-SiC substrates by dry O2 oxidation was investigated using atomic force microscopy (AFM) and transmission electron microscopy (TEM). When step bunching was present on a starting wafer, oxide surface roughness was much larger than that of the starting 4H-SiC surface. This is attributed to the difference in oxidation rate between the terrace and the step face. A step-terrace structure on 4H-SiC(0001) was mostly preserved on the oxide surface, but pronounced oxidation occurred around the step bunching. Cross-sectional TEM observation showed that the SiO2/4H-SiC interface became smoother than the initial surface and the thickness of the SiO2 layer fluctuated. Such SiO2 thickness fluctuation may cause a local electric field concentration when a voltage was applied to the oxide, thus degrading the dielectric breakdown characteristics of 4H-SiC metal-oxide-semiconductor (MOS) devices.

Abstract: Comparative studies of gate oxides on a N+ pre-implanted area (Ninterface ~1x1019cm-3) and on a virgin Si face 4H-SiC material (Ninterface ~1x1016cm-3) have been undertaken by means of Capacitance-Voltage (C-V) characteristics, performed at different temperatures and frequencies, and Thermal Dielectric Relaxation Current technique. In the non implanted samples, the stretch out of the C-V curves get larger as the temperature is lowered to 150K, while for lower temperatures the C-V characteristics become steeper and some discontinuities occur. These discontinuities are specific for the non-implanted sample and are associated with charging of the fast near interface states (NIToxfast) via a tunneling from the shallow interface states (Dit). The tunneling from the shallow Dit to NIToxfast supress the a.c. response of Dit, which is recovered only after most of the NIToxfast are charged with electrons.

Abstract: We have investigated the annealing of fixed oxide charge and interfacial traps in MISiC strucures by means of the photo capacitance voltage technique at temperatures up to 500°C. Elevated temperature measurements show reduced hysteresis and reduced fixed oxide charge at the interface. The photo capacitance technique shows a real-time measurement at elevated temperatures, in which electrons are populated by photo energy, in a 4H-SiC MIS structure. We also confirm the reduction of fixed oxide charge at the interface by means of high temperature post deposition annealing, which occurs during the high temperature measurements.

Abstract: The gate oxide reliability and channel mobility of carbon face (000-1) 4H Silicon Carbide (SiC) MOSFETs are investigated. Several gate oxidation processes including dry oxygen, pyrogenic steam, and nitrided oxides were investigated utilizing MOS capacitors for time dependent dielectric breakdown (TDDB), dielectric field strength, and MOSFETs for inversion layer mobility measurements. The results show the C-face can achieve reliability similar to the Si-face, however this is highly dependent on the gate oxide process. The reliability is inversely related to the field effect mobility where other research groups report that pyrogenic steam yields the highest electron mobility while this work shows it has weakest oxide in terms of dielectric strength and shortest time to failure.

Abstract: Using several types of surface analysis (Optical profilometers (OP), Atomic Force Microscopies (AFM), Scanning Electron Microscopies (SEM) and cross-sectional high-resolution Transmission Electron Microscopies (TEM)) we analyze the surface morphologies of misoriented 4H silicon carbide after pre-growth hydrogen etching and homo-epitaxial growths. We observed the characteristic self-ordering of nano-facets on any analyzed surface. This nano-faceting, which should not be confused with step bunching, can be considered as a close-to-equilibrium instability, for this reason can be hindered.

Abstract: Charge induced in 6H-SiC nMOS capacitors by 15 MeV oxygen ion microbeams was measured using Transient Ion Beam Induced Current (TIBIC) before and after gamma-ray irradiations. The peak amplitude of TIBIC signals decreases and the fall time increases with increasing number of incident ions. The decrease in the TIBIC peak eventually saturated. The TIBIC signal can be refreshed to its original shape by applying a positive bias of + 1V to gate oxide. Small decrease in both the peak amplitude of TIBIC signal and collected charge was observed due to gamma-ray irradiation.

Abstract: We have used C-V techniques to study the bias instability of 4H-SiC MOS capacitors and FETs, and compared those results to those obtained using ID-VGS. The net “back-and-forth” instability from C-V was found to exceed that of ID-VGS and matched closely with values from fast ID-VGS and midgap extrapolation, suggesting that the C-V method is more effective at measuring a “true” instability effect than ID-VGS alone. Using C-V, capacitors and large-area MOSFETs showed similar instability behavior, implying that the presence of minority carriers are not necessary to observe bias instability. One-way bias-stress C-V measurements reveal that most of the bias instability occurs under negative bias stress, whereas the opposite is observed in one-way bias stress ID-VGS measurements. Finally, post-oxidation NO annealing reduced the ΔVT bias instability for positive bias stress but does not appear to have influenced any of the other conditions.

Abstract: We present an electrically detected electron-spin-resonance (ESR) study on SiO2-SiC interface regions of n-channel lateral 4H-SiC MOSFETs with hydrogen annealing. This characterization technique can reveal electrically active defects that interact with channel currents of the MOSFETs. The defects were observed at 20 K, and were labeled “PH0” and “PH1”, one of which (PH1) exhibited a 1H hyperfine splitting of 5.3 mT.

Abstract: Surface properties of the 4H-SiC (0001) Si faces could be evaluated by the contact angle measurements with water droplet method, X-ray photoelectron spectroscopy and an atomic force microscope. The contact angles do not depend on the surface roughness under 3nm. The substrate surfaces with the contact angles over 30o will be terminated by hydrogen related species. The contact angles around 20o on 4H-SiC is caused by the removal of oxide layer with fluoride acid and terminated subsequently by the -CF species on the surface. The hydrophile surface of 4H-SiC is caused by the formation of chemical oxide layer as well as the case of the silicon wafers.