Solid State Phenomena Vols. 145-146

Abstract: As the dimensions of the structures of integrated circuits shrink, the influence of particles on device yield becomes increasingly important. According to the cleaning requirements of the International Technology Roadmap for Semiconductors (ITRS) in 2007, particles of 32 nm and larger are believed to be detrimental to devices and thus have to be removed. To remove nano-particles with minimal substrate loss and no damage requires very dilute chemistries and sufficiently gentle physical forces in a cleaning process. In this work the performance of an aerosol spray based cleaning technique is evaluated with regard to the removal efficiency of nano-particles as well as substrate loss and structural damage.

Abstract: In the conventional wet cleaning process of contact holes landing on the Si substrate and WSi metal gate, the ILD BPTEOS bowing and CD enlargement were often found by using dilute HF solution. With the device design rule decreasing, the CD size control and cleaning efficiency enhancement are highly demanded. In this work, the high aspect-ratio contact (AR~10) cleaning in single wafer (SW) tool was demonstrated in 58nm flash device. With the facilitation of nano-spray function to enhance particle removal efficiency (PRE), AM1 cleaning in SW tool can achieve the low contact resistance and tighten Rc distribution with less ILD film damage and lower CD enlargement. The parameter dependency of SW tool, including chemical injection method, nozzle swinging effect and nano-spray function, on contact resistance was also investigated. Compared to AM1 cleaning in bench tool, AM1 process in SW tool performs the larger process window for less ILD film damage at higher temperature and concentration.

Abstract: High velocity aerosol cleaning using ultrapure water or dilute aqueous solutions (e.g. dilute ammonia) is common in semiconductor IC fabrication [1]. This process combines droplet impact forces with continuous liquid flow for improved cleaning efficiency of sub-100nm particles. As with any physically enhanced cleaning process, improved particle removal can be accompanied by increased substrate damage, especially to smaller (<80nm) features [2]. Solvents such as N-methylpyrrolidone (NMP) and tetrahydrofurfuryl alcohol (THFA) are used for resist strip applications [3]. It is possible, and sometimes useful, to deliver these solvents through the same spray nozzle normally used for aqueous spray cleaning. In this presentation we explore the particle removal and substrate damage performance of 2-ethoxyethanol (EGEE), NMP and THFA as used in a conventional aerosol spray cleaning system

Abstract: A novel cleaning technique using steam-water mixed spray is proposed. Relatively low-pressure super-purified steam (0.1 MPa - 0.2 MPa) is mixed with super-purified water in a nozzle, and then sprayed on a silicon wafer surface, which is located at approximately 10 mm from the nozzle. The most striking result of this proposed technique is that we are able to clean a wafer surface, i.e., to eliminate fine particles, without using any chemicals.

Abstract: The removal of particles from silicon wafers without pattern damage during fabrication process is extremely important for increasing the yield. Various physically assisted cleaning techniques such as megasonic cleaning, jet spray cleaning, and laser shock wave cleaning (LSC) have been introduced. However, most of tools show pattern damage [1]. One of the main challenges in next generation cleaning process is the particle removal without the pattern damage. As the feature size continues to decrease, the patterns are so fragile that it is hard to remove particles less than 50 nm without pattern damages. To accomplish the effective cleaning performance without the damage, the collapse force of pattern and removal force of particle should be known quantitatively. In this paper, pattern collapse forces were measured for different gate stack patterns by lateral force microscope (LFM) [2]. The particle removal mechanism of LSC was studied to find the relationship between measured collapse forces and particle removal force by LSC which has a known applied force. Finally, particle contaminated pattern wafers were cleaned by LSC with optimized process parameters to verify the relationship and to achieve the best particle removal performance without the pattern damage.

Abstract: Conventional cleaning technologies have been effective in removal of particles, metals, and organic films. However, two trends motivating the development of new techniques are 1) the desire to minimize the environmental impact of large volumes of cleaning solutions; and 2) the need to clean at the sub-45 nm level, consistent with decreasing feature sizes. We report here on the initial characterization of a system to apply electrospray techniques to variants of the SC-1 and SC-2 solutions, as well as to solvent mixtures. We describe the generation of submicron sized droplets (<1 m radius) of cleaning mixtures and demonstrate a preliminary methodology, using a combination of experimental data and phenomenological modeling approaches, to characterize the physics of the droplet-surface interaction

Abstract: When a physical cleaning technology, such as megasonic and high-velocity-liquid aerosol cleaning, is considered for the removal of particles or photo resist residues, damage addition is a major concern. After detection of defects in long gate stack lines by bright field inspection (KT2800), SEM imaging shows they extend over a length in the order of 1μm (Figure 1) [1].

Abstract: Removal of particles from substrate wafers is one of the challenges in semiconductor industry. For this end, processes and equipment are developed using particle contaminated wafers. Preparation of these wafers differs from institute to institute, which makes it difficult to compare their cleaning performance results. The difference in behavior of differently prepared particle contaminated wafers is caused by the application method it self and the subsequent storage of these wafers after the particle application.

Abstract: In many process steps of integrated circuits (IC’s) fabrication, silicon wafers are coming in contact with process liquids such as ultra pure water (UPW) and aqueous and non-aqueous chemical mixtures. During these process steps, liquid-borne particle contamination can deposit on the wafer surface. Particle contamination from UPW is an important factor influencing random yield loss of IC’s [ ]. A number of yield models are used to predict yields including Poisson, Murphy, Seeds, and negative binomial models [ , ]. However, these models are based on the assumption that particles are randomly deposited on the wafer surface [ ].