Solid State Phenomena Vols. 145-146

Abstract: In this study, the compatibility of "HF-Based" cleaning with porous low-k integration, and “pore-sealing” approach was investigated, and specific attention was paid to ultra low-k porosity evolution. We also tried to demonstrate if "k-recovery" could be achieved by thinning the modified surface layer in the pattern trench walls (plasma damaged layer), for 65nm and 45 nm design rules.

Abstract: Approximately 20% of the processing steps in integrated circuit (IC) fabrication involve surface cleaning and removal of photoresist and plasma etch residues. Continuous device minimization requires the use of thin films (<20 nm), closely spaced features, and ultra shallow junctions (<50nm); as a result, the challenges associated with effective surface cleaning are intensified. In addition, to insure high device performance, incorporation of alternate materials such as copper, ruthenium, and molybdenum, porous low dielectric constant SiO2-based insulators, and hafnium or zirconium oxides or silicates into device structures is taking place. Integration of these materials into working devices requires precise control of surface properties. In order to eliminate damage to films or substrates, avoid modification of surfaces, promote contaminant removal rates and enhance process control, approaches such as use of downstream plasmas, liquid cleaning with low concentrations of reactive chemicals, mechanical agitation, and liquid or particle jets have been implemented [1].

Abstract: This work deals with the application of ozonated water for the BEOL stripping of DUV-resists. For this purpose analytical techniques for the quantification of molecular O3 in the water as well as methods for the non-destructive analysis of resists on wafers have been studied. The aim is to be able to determine the concentrations of O3, its decomposition, under the influence of various parameters, and to correlate these data with the polymer structure of the resist on the wafer and the efficiency of resist removal.

Abstract: At 32nm and below the integration of extreme low-k dielectrics (ELK) with a permittivity of 2.2 or lower will require considerable process optimization at etch and clean to maintain critical dimension (CD) and effective k. Of equal concern is the impact on yield and reliability of lateral Cu etch or incomplete removal of copper oxides (CuOx) during post etch residue (PER) cleaning. These are not new issues but the challenges of solving them in the presence of ELK’s are considerable not least in relation to the question of selectivity towards “damaged low k” interfaces, often described as densified or C depleted layers.

Abstract: The removal of plasma etch residues by wet cleaning is an alternative or additional process to plasma processes, which are known to degrade low-k and ultralow-k dielectric materials. Besides Cu/low-k compatibility wetting is an important issue for wet cleaning. Surface energy of solid and liquid is the key to understand the wetting behaviour. In this study we examined the energetic character of plasma etched/stripped solid surfaces, etch polymers and several cleaning solutions by contact angle measurements. The results show, that variations of the etching process can heavily change the energetic character of the solid. Calculating the surface energies of solid and liquid provides the possibility to make a prediction if a cleaning liquid will wet the surface which has to be cleaned.

Abstract: In Back-End-of-Line processing, the remaining photoresist layer after plasma etch is traditionally removed using a plasma process. Plasma process was reported to induce damage to porous dielectric [1-3]. To minimize damage to low-k material, wet alternative methods of removal of photoresist layer on porous low-k dielectrics are gaining a renewed interest [4]. However, the presence of a “crust” generated by etch plasma at the photoresist surface makes it impossible to completely remove by a pure organic solvent. Indeed, the crust, most likely composed of crosslinked polymer, is not soluble in organic solvents [5]. For this reason, a UV pre-treatment is investigated to break cross-links in the crust or to modify the crust to enhance removal efficiency with solvent stripping in more advanced generations.

Abstract: The development of new functional cleaning agents is strongly required for leading-edge LSI fabrication, such as resist removal process without any damage to low-k materials. For example, as excessive acid cleaning agents would damage such materials. Consequently, a low damage cleaning technique with no collapsing fine structures is also desirable. On the other hand, the concept of recycle of cleaning agents is an urgent issue for the reduction of cleaning cost. Therefore, both cleaning ability and easy recyclable function are essential for next generation cleaning agents. Fluorine-based cleaning agents have been widely used for cleaning, rinsing and drying process in the electronics industry. Asahi Glass Corporation (AGC) has commercialized various fluorine-based cleaning agents as AC-series (Hydrofluorocarbon: HFC) and AE-series (Hydorofluoroether: HFE). Typical properties of these compounds are summarized in Table I. Here we report the application of fluorine-based cleaning agents to ArF resist removal and the evaluation of the recycles.

Abstract: Copper has been widely used as the interconnect material for integrated circuits because of the good electrical conductivity and electron migration resistance. Copper dual damascene structure has been adapted due to the impossibility of etching the copper. For via first dual damascene (VFDD) integration, via is opened after trench etch. Generally, diluted HF cleaning after trench etch is used to remove both etch residues and carbon depletion layer of low-k material. In this study, we investigated the characteristics of copper dendritic formation occurred in post trench etch cleaning with single wafer spin tool (SWST).

Abstract: Iminodiacetic acid (IMDA), NH(CH2CO2H)2, whose molecular structure is shown in figure 1, is a small molecule but has a very large scope for interacting with copper due to its two carboxylic acid and imine functionalities, which have been shown to bind strongly to copper [1,2,3]. The electronegative oxygen and nitrogen atoms present also make this a good candidate for hydrogen bonding, which often leads to very stable ordered two dimensional (2D) structures being formed across surfaces.

Abstract: In semiconductor processing, test wafers are used as particle monitors, film thickness monitors for deposition and oxide growth measurements, dry/wet etch rate monitors, CMP monitors, as well as characterizing new and existing equipment and processes. Depending on fab size and capacity, monthly test wafer usage can be tens of thousands or more. Due to the ever increasing demand for silicon between the IC and solar markets and the high cost of 300mm wafers, chip manufacturers are increasing their efforts to reduce overall spending on silicon - currently by far the largest non equipment related cost [1]. One approach taken by many chip makers is the concept of extending the usable life of test wafers by re-using them as many times as possible through a reclaim process.