Silicon Carbide and Related Materials 2005

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Authors: K. Zhu, G. Li, D. Johnstone, Y. Fu, J.H. Leach, B. Ganguly, Cole W. Litton, Hadis Morkoç
Abstract: 4H SiC high power photoconductive semiconductor switching devices were fabricated. A highly doped n+-GaN subcontact epilayer was grown on SiC by organometallic vapor phase epitaxy in order to improve ohmic contact and avoid contact damage or degradation due to current filamentation, under high power operation. With an n+-GaN subcontact layer, the contact resistance was reduced and current crowding alleviated. Therefore the electrodes were not damaged or degraded at high power operation. Photocurrent up to 200 A and breakdown voltage up to 2900 V have been observed for the devices.
Authors: Yoshitaka Sugawara
Abstract: To achieve large current capability in spite of present small SiC devices that are limited by various crystal defects, focus was placed on SiC GTO thyristor and SICGT have been developed as an advanced SiC GTO. SICGTs with current capability of 1.6-100 A and blocking voltage of 3-12.7 kV and a 3 phase PWM SICGT inverter with output power of 35 kVA have been successfully developed. Furthermore, application of the SiC inverter aimed to a load leveling system was demonstrated.
Authors: Anant K. Agarwal, Sumi Krishnaswami, Ben Damsky, Jim Richmond, Craig Capell, Sei Hyung Ryu, John W. Palmour
Abstract: We report on the development of the first 1 cm x 1 cm SiC Thyristor chip capable of blocking 5 kV. This demonstrates the present quality of the SiC substrate and epitaxial material. A forward drop of 4.1 V at 100 A and 25°C has been measured. The turn-on delay is found to be a strong function of the gate current. At a gate current of 0.5 A, a turn-on delay of 250 ns is observed for an anode to cathode current of 200 A. The turn-on delay reduces to 72 ns for an IG = 1.5 A. The turn-on rise time is a strong function of the anode to cathode voltage, VAK. At VAK =230 V, the turn-on rise-time is 300 ns for IAK =200 A. The rise-time reduces to 26 ns for VAK = 500 V.
Authors: Lin Zhu, T. Paul Chow
Abstract: For SiC devices capable of blocking very high voltages (>4kV), it becomes imperative to use bipolar devices because of unacceptably large on-state losses of unipolar devices. The IGBT offers the potential for high current density operation and ease of turn off using a MOS gate structure. In this work, 15kV 4H-SiC n-channel UMOS PT (Punch Through) IGBTs with injection enhancement effect near the top emitter and transparent pemitter structure at the collector have been demonstrated to have a forward drop approaching that of a PiN junction rectifier. With proper design, a PiN-like carrier distribution in the drift region can be achieved, which allows a better trade-off between collector-emitter saturation voltage (VCE(sat)) and turn-off loss (Eoff) than conventional SiC UMOS IGBTs.
Authors: Qing Chun Jon Zhang, Sei Hyung Ryu, Charlotte Jonas, Anant K. Agarwal, John W. Palmour
Authors: Anant K. Agarwal, Sumi Krishnaswami, Jim Richmond, Craig Capell, Sei Hyung Ryu, John W. Palmour, Bruce Geil, Dimos Katsis, Charles Scozzie, Robert E. Stahlbush
Abstract: SiC BJTs show instability in the I-V characteristics after as little as 15 minutes of operation. The current gain reduces, the on-resistance in saturation increases, and the slope of the output characteristics in the active region increases. This degradation in the I-V characteristics continues with many hours of operation. It is speculated that this phenomenon is caused by the growth of stacking faults from certain basal plane dislocations within the base layer of the SiC BJT. Stacking fault growth within the base layer is observed by light emission imaging. The energy for this expansion of the stacking fault comes from the electron-hole recombination in the forward biased base-emitter junction. This results in reduction of the effective minority carrier lifetime, increasing the electron-hole recombination in the base in the immediate vicinity of the stacking fault, leading to a reduction in the current gain. It should be noted that this explanation is only a suggestion with no conclusive proof at this stage.
Authors: Anant K. Agarwal, Fatima Husna, Jeremy Haley, Howard Bartlow, Bill McCalpin, Sumi Krishnaswami, Craig Capell, Sei Hyung Ryu, John W. Palmour
Abstract: For the first time, 4H-SiC RF bipolar junction transistors have been used to produce an output power in excess of 2.1 kW at 425 MHz. For an input pulse width of 2 μs and 1% duty cycle, the power gain at peak output power is 6.3 dB with the collector efficiency and power added efficiency [PAE] being 45% and 35%, respectively, at a collector supply voltage of 75 V in a class C configuration. The package consists of 24 cells (2 chips) having an emitter periphery of approximately 1 inch per cell. Each cell produced a DC current gain (β) of 15 and a common emitter breakdown voltage (BVCEO) greater than 250 V. A peak output power of 87 W per cell was obtained at 425 MHz, as compared to the earlier report of 50 W per cell [1, 2] by using a shorter pulse width and duty cycle.
Authors: Jian Hui Zhang, Jian Wu, Petre Alexandrov, Terry Burke, Kuang Sheng, Jian Hui Zhao
Abstract: This paper reports recent progress in the development of high power 4H-SiC BJTs based on an improved device design and fabrication scheme. Near theoretical limit high blocking voltage of VCEO=1,836 V has been achieved for 4H-SiC BJTs based on a drift layer of only 12 μm, doped to 6.7x1015 cm-3. The collector current measured for a single cell BJT with an active area of 0.61 mm2 is up to IC=9.87 A (JC=1618 A/cm2). The collector current is 7.64 A (JC=1252 A/cm2) at VCE=5.9 V in the saturation region, corresponding to an absolute specific on-resistance (RSP_ON) of 4.7 m9·cm2. From VCE=2.4 V to VCE= 5.8 V, the BJT has a differential RSP_ON of only 3.9 m9·cm2. The current gain is about 8.8 at Ic=5.3 A (869 A/cm2). This 4H-SiC BJT shows a V2/RSP_ON of 717 MW/cm2, which is the highest value reported to date for high-voltage and high-current 4H-SiC BJTs. A verylarge area 4H-SiC BJT with an active area of 11.3 mm2 is also demonstrated.
Authors: Ivan Perez-Wurfl, Feng Zhao, Chih Fang Huang, John Torvik, Bart Van Zeghbroeck
Abstract: We report for the first time on RF SiC BJTs fabricated on semi-insulating (SI) substrates with L-band performance. Small-periphery (4x150μm) devices were tested using on-wafer load-pull measurements up to 1.5GHz. Under pulsed conditions, the devices exhibited 10dB of power gain at 1GHz and a peak power density of 2.3W/mm (1.4W) with a 100μs pulse width and a 1% duty cycle. The power gain decreased to 8dB at 1GHz under CW conditions at a power density of 1.6W/mm (1W). The load-pull measurements were performed up to 125oC, which resulted in a 1 dB reduction of power gain compared to the room temperature performance. Results at 0.5 and 1.5 GHz are presented as well.
Authors: Martin Domeij, Hyung Seok Lee, Carl Mikael Zetterling, Mikael Östling, Adolf Schöner
Abstract: This paper reports the fabrication of epitaxial 4H-SiC bipolar junction transistors (BJTs) with a maximum current gain β=64 and a breakdown voltage of 1100 V. The high β value is attributed to high material quality obtained after a continuous epitaxial growth of the base-emitter junction. The current gain of the BJTs increases with increasing emitter width indicating a significant influence of surface recombination. This “emitter-size” effect is in good agreement with device simulations including recombination in interface states at the etched termination of the baseemitter junction.

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