Materials Science Forum Vols. 600-603

Abstract: The development of lapping and polishing technologies for SiC single crystal wafers has realized the fabrication of an extremely flat SiC wafer with excellent surface quality. To improve the SiC wafer flatness, we developed a four-step lapping process consisting of four stages of both-side lapping with different grit-size abrasives. We have applied this process to lapping of 2-inch-diameter SiC wafers and obtained an excellent flatness with TTV (total thickness variation) of less than 3 μm, LTV (local thickness variation) of less than 1 μm, and SORI smaller than 10 μm. We also developed a novel MCP (mechano-chemical polishing) process for SiC wafers to obtain a damage-free smooth surface. During MCP, oxidizing agents added to colloidal silica slurry, such as NaOCl and H2O2, effectively oxidize the SiC wafer surface, and then the resulting oxides are removed by colloidal silica. AFM (atomic force microscope) observation of polished wafer surface revealed that this process allows us to have excellent surface smoothness as low as Ra=0.168 nm and RMS=0.2 nm.

Abstract: To use SiC substrate as a semiconductor device and epitaxial growth, the surface of SiC substrate should be made smooth at an atomic level in the state of monocrystalline. But, the past slurry caused defects such as the pit and the scratch on the surface. This tendency was very strong in (000-1) C-face. We achieved ideal surface for SiC devices using newly developed slurry. In this surface, the roughness (Ra) of (0001) Si face and (000-1) C face evaluated by the AFM were 0.1nm or less, and confirmed that the surface were monocrystalline by CAICISS measurement. From these results, it is thought that the crystal face obtained by the slurry newly developed. In addition, the Schottky barrier diode was formed directly on the polished surface, that was obtained the breakdown voltage of 1.2kV or more. We thought that this results is possible to make the Schottky barrier diode without epitaxial growth.

Abstract: In this article, the correlation of surface morphological defects and barrier-height inhomogeneities with the electrical characteristics of defective 4H-SiC Schottky barrier diodes (SBDs) before and after chemical-mechanical polishing (CMP) is investigated. The forward characteristics, an ideality factor and a single barrier height of a SBD, remain the same after CMP, so that CMP does not affect SBD characteristics. Most barrier-height inhomogeneities are eliminated or improved after CMP. Therefore, leakage current induced by barrier-height inhomogeneities are improved by CMP as well. In addition, about 40% of SBDs with carrots inside the active areas exhibits double barriers before CMP. This excludes that carrots are a cause of barrier-height inhomogeneities. In reverse-bias mode, CMP reduces reverse leakage current at low bias and increases breakdown voltage due to the reduction of thermionic field emission and elimination of local enhanced electric fields.

Abstract: 2inch 6H-SiC (0001) wafers were sliced from the ingot grown by a conventional physical vapor transport (PVT) method using an abrasive multi-wire saw. While sliced SiC wafers lapped by a slurry with 1~9㎛ diamond particles had a mean height (Ra) value of 40nm, wafers after the final mechanical polishing using the slurry of 0.1㎛ diamond particles exhibited Ra of 4Å. In this study, we focused on investigation into the effect of the slurry type of chemical mechanical polishing (CMP) on the material removal rate of SiC materials and the change in surface roughness by adding abrasives and oxidizer to conventional KOH-based colloidal silica slurry. The nano-sized diamond slurry (average grain size of 25nm) added in KOH-based colloidal silica slurry resulted in a material removal rate (MRR) of 0.07mg/hr and the Ra of 1.811Å. The addition of oxidizer (NaOCl) in the nano-size diamond and KOH based colloidal silica slurry was proven to improve the CMP characteristics for SiC wafer, having a MRR of 0.3mg/hr and Ra of 1.087Å.

Abstract: We report a damage-free and efficient planarization process for silicon carbide (SiC) using platinum as a catalyst in hydrofluoric acid (HF) solution. In previous studies, 4H-SiC (0001) on-axis wafers were planarized by this process and an extremely flat surface was obtained. However, electronic device substrates require off-axis wafers. In the present study, 4H-SiC (0001) 8° off-axis Si-face wafers were planarized using a Pt catalyst plate and HF solution. In the first trial using these wafers, the surface roughness worsened and a diagonal pattern was observed by phase-shift interference microscopy. The pattern seemed to have been formed when the Pt plate morphology was transcribed onto the wafer. The removal rate of the 8° off-axis Si-face wafer is much greater than that of the on-axis Si-face wafer. Thus, we concluded that the use of a smoother catalyst plate would be necessary to obtain a smooth 8° off-axis Si-face wafer surface. Improving the Pt plate morphology by hand lapping also improved the surface roughness of the processed wafer as compared with the preprocessed surface. The maximum height of the surface irregularity (peak-to-valley, P-V) and root-mean-square roughness were improved to 0.513 nm and 0.044 nm, respectively, as determined by atomic force microscopy (2×2 μm2).

Abstract: The influence of the chemical mechanical planarization process on the 4o off-axis 4HN SiC removal rate for silicon carbide slurry produced by Cabot Microelectronics Corporation (CMC) has been studied. A detailed kinetic analysis was applied and the linearity of an Arrhenius-like activation energy plot suggests that the primary removal occurs from particles adhered to the pad surface.

Abstract: Beveling is essential for preventing the chipping of the edge of a wafer during surface polishing and other processes. Plasma chemical vaporization machining (PCVM) is an atmospheric-pressure plasma etching process. It has a high removal rate equivalent to those of conventional machining methods such as grinding and lapping, which are used for high-hardness materials such as silicon carbide, due to the generation of high-density radicals in atmospheric-pressure plasma. Furthermore, PCVM does not damage the wafer surface because it is a purely chemical process; therefore, it is considered that PCVM can be used as an effective method of beveling the edge of SiC wafers. In this paper, we report the investigation of the beveling of SiC wafers by PCVM.

Abstract: Silicon carbide (SiC) is a promising semiconductor material for power devices. However, it is extremely hard and chemically stable; thus there is no efficient method of machining it without causing damage to the machined surface. Plasma chemical vaporization machining (PCVM) is plasma etching in atmospheric-pressure plasma. PCVM has a high removal rate because the radical density in atmospheric-pressure plasma is much higher than that in conventional low-pressure plasma. Although it was found that the machining characteristic of SiC by PCVM had stronger rf power dependence than that of Si, it has not been clear whether it is radical density dependence or temperature dependence. In this paper, the temperature dependences of the PCVM of Si and SiC are examined using pipe electrode apparatus. As a result, it is found that the removal rate of SiC has a much stronger temperature dependence than that of Si and that the surface roughness of the SiC Si face becomes worse as the etching temperature increases whereas that of the C face does not increase at etching temperatures of up to 360°C.

Abstract: In order to cut the ingots and slabs of the silicon carbide (SiC), we developed the new method of electric discharge machining (EDM). EDM is usually used for the machining of the metals, and if it is electric conductive material, it is effective for the machining. However, if the electrical resistivity of SiC is high, the electric current cannot be large enough for and the EDM, and we failed the machining of SiC. Therefore, we use three methods to keep higher electric conduction. One is photoconductive, the second is high electric field effect and it is called avalanche effect, and the third is high temperature effect because usually the resistivity is low when the semiconductor or insulation materials are in high temperature. Thus, we applied three method, and finally can cut the SiC slabs of the resistivity of the order of 10 Ωm, which is almost 1000 times higher than that of the ordinary EDM at least. The flatness of the cutting surface is the same of the metals’ and the cutting rate for the SiC ingots is 10 times higher than that of diamond saw. This technique will be effective for the related materials of SiC, such as diamonds and GaN.

Abstract: In this study, we report electric discharge machining (EDM) as a new cutting method for silicon carbide (SiC) single crystals. Moreover, we discuss characteristics and usefulness of the EDM for the SiC. The EDM realized not only high speed and smooth cutting but also lower surface damage. Defect propagation in the EDM SiCs have been also estimated by etch pits observation using molten KOH, however, we confirmed the EDM has caused no damage inside the SiCs in spite of high voltage and high temperature during the machining.