Solid State Phenomena
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Vol. 113
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Vol. 111
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Solid State Phenomena
Vol. 110
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Solid State Phenomena
Vols. 108-109
Vols. 108-109
Solid State Phenomena
Vol. 107
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Solid State Phenomena
Vol. 106
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Vol. 105
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Solid State Phenomena
Vols. 103-104
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Solid State Phenomena
Vols. 101-102
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Solid State Phenomena
Vols. 99-100
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Solid State Phenomena Vols. 108-109
Paper Title Page
Abstract: The fully depleted SOI devices present lateral isolation issues due to the shallow trench isolation (STI) process. We propose in this paper to study a new fabrication process for integrating local isolation trenches. Germanium (Ge) implantation is used to create SiGe (Silicon-Germanium) layer on thin SOI (silicon on insulator) that can be selectively etched. The advantage is the capability of implantation to localize the SiGe area on this substrate and to avoid STI process issues. Aggressive dimensions and geometries are studied and resulting material transformation (crystallization and Ge diffusion) are apprehending via SEM (Secondary Electron Microscopy) or AFM (Atomic Force Spectroscopy) to understand the etching kinetics. After optimization, we demonstrate the capability of fabricating localized trenches on SOI without degrading the neighboring Si layer or consuming the thin BOX (buried oxide).
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Abstract: We have focused in this paper on the impact of the growth rate and of the grading rate on the structural properties of Si0.8Ge0.2 virtual substrates grown at 900°C in a commercial reduced pressure chemical vapour deposition reactor. Adopting a grading rate of 4% Ge / $m together with a growth rate around 140 nm min.-1 yields very high quality Si0.8Ge0.2 virtual substrates. Their macroscopic degree of strain relaxation is indeed very close to 100%, their surface root mean square roughness is around 2.3 nm and most importantly their field threading dislocation density is of the order of 6x104 cm-2 only, with almost no pile-ups.
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Abstract: Four types of SGOI (SiGe on Insulator) wafers were fabricated by the combination of SiGe epitaxial growth, SIMOX (Separation by Implanted Oxygen) processes and oxidation. By the cross-sectional TEM (Transmission Electron Microscopy) and EDS (Energy Dispersive Spectroscopy), it is confirmed that each wafer has smooth interface between a top layer (Si or SiGe) and a BOX (buried oxide) layer and Ge atoms in SiGe layer distribute homogeneously for SGOI_A and SGOI_B.
Using high-resolution X-ray diffractometry, the crystallographic properties of SiGe layer are characterized with in-plane and out of plane diffraction methods. The lattice constants are calculated for the planes of perpendicular and parallel to wafer surface and the degree of relaxation are estimated for the SiGe layer of each wafer. The rocking curve measurements reveal that the lattice turbulence of SiGe layer is influenced by SIMOX process conditions, Ge content and the layer thickness.
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Abstract: In this paper we study the effect of chemical environment and elastic strains, which can arise in layered heterostructures due to the lattice parameter mismatch, on the vacancy formation energy in random Si-Ge compounds. Ab initio calculations demonstrate a number of simple trends characterizing the vacancy formation energy dependence on vacancy charge, the number of Ge atoms in its neighbourhood and on the magnitude of elastic strains. The obtained parameters of vacancy-germanium interaction indicate, in particular, a tendency for preferential vacancy accumulation in SiGe region of Si/SiGe/Si layered structures, which is confirmed here by Monte- Carlo simulation of high-temperature vacancy annealing and agrees well with recent experimental observations.
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Abstract: Molecular beam epitaxy is employed for the growth of strained-Si layers on top of virtual substrates with highly-relaxed ultrathin SiGe buffers in a continuous procedure. An initial growth stage at a temperature-ramp down to below 200°C causes misfit-dislocation generation by nucleation from point defects and provides an early relaxation in the SiGe buffers. In situ monitoring is used for the growth control. Layer thicknesses and composition are proved by ex situ spectroscopic ellipsometry. %Raman investigations on the layer stacks reveal high degrees of relaxation (70-100%) in sub-100nm SiGe buffer layers containing from 12 to 42 % Ge. Stress in strained Si layers estimated by means of Raman-spectra shift is adjustable from 0.92 to 6.84 GPa by the Ge-content in virtual substrates. Surface morphology of strained Si and of relaxed SiGe buffers is smooth and crosshatch-free. Device test structures show substantial increase of carrier mobilities in nMOSFETs fabricated on these strained-Si layers.
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Abstract: Cavity effect on the room-temperature (RT) photoluminescence (PL) from emitting centers in the top silicon layer of silicon-on-insulator (SOI) structure has been studied. The lightemitting centers were produced by the implantation of H+ ions and subsequent annealing at the temperatures Ta = 450-1000 oC for 5 h in an Ar ambient under pressure P = 1 - 1.2×104 bar. It has been obtained that annealing under hydrostatic pressure higher than 6 kbar prevented the outdiffusion of hydrogen in the form of gas bubbles, which took place after annealing at Ta≥600 oC under atmospheric conditions. Absence of micro-pores and gas bubbles in the top surface region creates the conditions to retain the mirror quality of the SOI/air interface. A wavelength-selective effect of the formed cavity on visible PL has been observed from the H+ ion implanted SOI structures annealed under pressure of 12 kbar. The cavity enhancement of PL emission for 23-40 times has been found at the wavelength of 515 and 560 nm.
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Abstract: We present experimental data on the effect of low-temperature buffer layers on the dislocation structure formation in SiGe/Si strained-layer heterostructures under thermal annealing. Specific subjects include mechanisms of misfit dislocation nucleation, propagation and multiplication as well as the role of intrinsic point defects in these processes. Samples with lowtemperature Si (400°C) and SiGe (250°C) buffer layers were grown by MBE. In general, the processes of MD generation occur similarly in the heterostructures studied independently of the alloy composition (Ge content: 0.15, 0.30) and kind of buffer layer. Intrinsic point defects related to the low-temperature epitaxial growth influence mainly the rate of misfit dislocation nucleation.
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Abstract: Electrical transport and traps in vertical SiGe/Si QW structures of low background doping level are studied in the presented report. Temperature activation of holes from the quantum well was found to determine the vertical current through Si/SiGe/Si structures at T > 160 K. At lower temperatures (T < 130 K), the current mechanism is attributed to a thermally activated tunneling of holes from quantum well. Deep traps are observed in the Si/SiGe/Si structures in high concentration (1011 – 1012 cm-2). Traps are most likely assistance in the current in the vertical Si/SiGe/Si structures as recombination centers near the QW.
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Abstract: Oxygen-rich crystalline silicon materials doped with boron are plagued by the presence of a well-known carrier-induced defect, usually triggered by illumination. Despite its importance in photovoltaic materials, the chemical make-up of the defect remains unclear. In this paper we examine whether the presence of excess silicon self-interstitials, introduced by ion-implantation, affects the formation of the defects under illumination. The results reveal that there is no discernible change in the carrier-induced defect concentration, although there is evidence for other defects caused by interactions between interstitials and oxygen. The insensitivity of the carrier-induced defect formation to the presence of silicon interstitials suggests that neither interstitials themselves, nor species heavily affected by their presence (such as interstitial boron), are likely to be involved in the defect structure, consistent with recent theoretical modelling.
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