Materials Science Forum Vols. 600-603

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Abstract: The aim of the present work is to study the structural properties of 3C-SiC which is grown on (0001) 6H-SiC and on (100) 3C-SiC (Hoya) seeds using the Continuous Feed Physical Vapor Transport (CF-PVT) method. Transmission Electron Microscopy (TEM) observations confirm that the overgrown layer is of the 3C-SiC polytype. In the case of the 6H-SiC substrate, microtwins (MTs), stacking faults (SFs) and dislocations (D) are observed at the substrate-overgrown interface with most of the dislocations annihilating within the first few µm from the interface. In the case of 3C-SiC crystals grown on 3C seeds, repeated SFs are formed locally and also coherent (111) twins of 3C-SiC are frequently observed near the surface. The SF density is reduced at the uppermost part of the grown material.
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Abstract: We have investigated through birefringence microscopy, a set of 3C-SiC crystals grown with the CF-PVT process, starting from different seeds and under different growth conditions. Through self nucleation experiments, the stable growth of very high quality 3C-SiC crystals at high temperature (2100°C) and at high rate (roughly 0.2 mm/h) is demonstrated. The possibility to develop bulk growth of 3C-SiC crystals is discussed.
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Abstract: The development of SiC bulk and epitaxial materials is reviewed with an emphasis on epitaxial growth using high-throughput, multi-wafer, vapor phase epitaxial (VPE) warm-wall planetary reactors. It will be shown how the recent emergence of low-cost high-quality 100-mm diameter epitaxial SiC wafers is enabling the economical production of advanced wide-bandgap Power–Switching devices.
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Abstract: Modeling and simulation of the SiC growth processes, Physical Vapor Transport (PVT), Chemical Vapor Deposition (CVD), are sufficiently mature to help building new process equipment or up-scaling old ones. It is possible (i) to simulate accurately temperature and deposition distributions, as well as doping (ii) to quantify the limiting phenomena, (iii) to understand the important role of different precursors in CVD and hydrogen additions in PVT. The first conclusion of this paper is the importance of the "effective" C/Si ratio during CVD epitaxy in hot-wall reactors and its capability to explain the doping concentrations. The second conclusion is the influence of the C/Si ratio in alternative bulk growth technique involving gas additions.
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Abstract: In 3C-SiC MOSFETs, planar defects like anti-phase boundaries (APBs) and stacking-faults (SFs) reduce the breakdown voltage and induce leakage current. Although the planar defect density can be reduced by growing 3C-SiC on undulant-Si substrate, specific type of SFs, which expose the Si-face, remains on the (001) surface. Those SFs increase the leakage current in devices made with 3C-SiC. In order to eliminate the residual SFs, an advanced SF reduction method involving polarity conversion and homo-epitaxial growth was developed. This method is called switch-back epitaxy (SBE) and consists of the conversion of the SF surface polarity from Si-face to C-face and following homo-epitaxial growth. The reduction of the SF density in SBE 3C-SiC results in a tremendous improvement of the device performance. The combination of the achieved blocking voltage with the demonstrated high current capability indicates the potential of 3C-SiC vertical MOSFETs for high and medium power electronic applications such as electric and hybrid electric vehicle (EV/HEV) motor drives.
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Abstract: In this paper, we present results of epitaxial layer deposition for production needs using our hot-wall CVD multi-wafer system VP2000HW from Epigress with a capability of processing 7×3” or 6×100mm wafers per run in a new 100mm setup. Intra-wafer and wafer-to-wafer homogeneities of doping and thickness for full-loaded 6×100mm and 7×3” runs will be shown. Results on Schottky Barrier Diodes (SBD) processed in the multi-wafer system will be given. Furthermore, we show results for n- and p-type SiC homoepitaxial growth on 3”, 4° off-oriented substrates using a single-wafer hot-wall reactor VP508GFR from Epigress for the development of PiN-diodes with blocking voltages above 6.5 kV. Characteristics of n- and p-type epilayers and doping memory effects are discussed. 6.5 kV PiN-diodes were fabricated and electrically characterized. Results on reverse blocking behaviour, forward characteristics and drift stability will be presented.
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Abstract: We have developed a horizontal hot-wall reactor for growing extremely uniform epilayers on 100-mm diameter SiC substrates using a novel supplemental reagent source. Doping and thickness variations of 2% and 1% s / mean, respectively, have been demonstrated. The typical defect density is 2 cm-2. We describe the growth cell in detail and discuss the development of the design and process to produce these very uniform epilayers.
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Abstract: Epitaxial growth of 3-in, 4° off-axis 4H SiC with addition of HCl has been presented. Good surface morphology with a low defect density has been obtained, even for epi thickness of 38 µm. Comprehensive characterization techniques conducted on the epi material obtained in this process have independently confirmed the high purity and low density of crystalline imperfections. Low temperature PL displays clear free exciton I77 recombination while no L1 line is discernable. DLTS measurements have confirmed a low concentration of Z1/2 and EH6/7 below or in the range of 1011 cm-3. Time resolved PL at room temperature performed on a 38 µm thick epi wafer gives long carrier lifetime in the range of 1.5 to above 5 µsec. PiN diodes with diode area up to 25 mm2 have demonstrated blocking voltages above 900V, with a max electric field of above 2.5 MV/cm.
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Abstract: The homoepitaxial chloride-based CVD growth is demonstrated on Si-face on-axis 4H-SiC substrates. The use of chloride-based CVD has allowed growth of 100% 4H-SiC epitaxial layers with a growth rate of 20µm/h, thus about seven times higher than with standard precursors. It was also found that chlorine etches preferentially the 3C-SiC inclusions that tends to nucleate on Si-face on-axis substrates. Therefore the Cl/Si ratio is a fundamental process parameter to optimize.
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Abstract: A vertical hot-wall type epi-reactor that makes it possible to simultaneously achieve both a high rate of epitaxial growth and large-area uniformity at the same time has been developed. A maximum growth rate of 250 µm/h is achieved at 1650 °C. Thickness uniformity of 1.1 % and doping uniformity of 6.7 % for a 65 mm radius area are achieved while maintaining a high growth rate of 79 µm/h. We also succeeded in growing a 280 µm-thick epilayer with excellent surface morphology and long carrier lifetime of ~1 µs on average. The LTPL spectrum shows free exciton peaks as dominant, and few impurity-related or intrinsic defect related peaks are observed. The DLTS measurement for an epilayer grown at 80 µm/h shows low trap concentrations of 1.2×1012 cm-3 for Z1/2 center and 6.3×1011 cm-3 for EH6/7 center, respectively.
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