Materials Science Forum Vols. 645-648

Abstract: Fast and thick 4H-SiC epitaxial growth is demonstrated in a vertical-type reactor under a low system pressure within the range 13-40 mbar. A very fast growth rate of up to 250 m/h is obtained. The material quality of the epilayers grown in the reactor is evaluated by low-temperature photoluminescence, deep level transient spectroscopy, microwave photoconductive decay, synchrotron topography and room temperature PL imaging. The carrier lifetime of thick epilayers with or without the application of the C+-implantation/annealing method and extended defects in the epilayers grown on 8º and 4º off substrates are discussed.

Abstract: Homoepitaxial growth has been performed on 3” Si-face on-axis 4H–SiC substrates using standard gas system in a horizontal Hot-wall chemical vapor deposition system. Substrate surface damages are found to act as preferential nucleation sites for 3C inclusions also, the surface morphology after in-situ etching is found to largely influence the polytype stability in the epilayer. Different in-situ etching conditions were studied where Si-rich conditions are found to be better. Growth parameters and starting growth conditions are refined to obtain stable polytype in the epilayer. High quality homoepitaxial layers with 100% 4H–SiC are obtained on 3” substrates. Different optical and structural techniques are used to characterize the layers and to understand the growth mechanisms. The layers are found to be of high quality and no epitaxial defects typically found on off-axis epitaxial layers are observed. A high surface roughness is observed in these layers, however higher growth rate significantly lowers the surface roughness without affecting the polytype stability in the epilayer.

Abstract: In this paper, we present first results of epitaxial layer deposition using a novel warm-wall CVD multi-wafer system AIX 2800G4 WW from AIXTRON with a capability of processing 10x100mm wafers per run. Intra-wafer and wafer-to-wafer homogeneities of doping and thickness for full-loaded 10x100mm runs will be shown and compared to results of the 6x100mm setup of our hot-wall reactor VP2000HW by AIXTRON used for device production since 2001.

Abstract: A chloride-based CVD process has been studied in concentrated growth conditions. A systematic study of different carrier flows and pressures has been done in order to get good quality epilayers on 8° off and on-axis substrates while using very low carrier flows. Hydrogen chloride (HCl) was added to the standard gas mixture to keep a high growth rate and to get homo-polytypic growth on on-axis substrates. The carrier flow was reduced down to one order of magnitude less than under typical growth condition. By lowering the process pressure it was possible to reduce precursor depletion along the susceptor which improved the thickness uniformity to below 2% variation (σ/mean) over a 2” diameter wafer.

Abstract: We have carried out detailed investigations of 4H-SiC homoepitaxial growth on vicinal off-angled Si-face substrates. We found that the surface morphology of the substrate just after in-situ H2 etching was also affected by the value of the vicinal-off angle. Growth conditions consisting of a low C/Si ratio and a low growth temperature were effective in suppressing macro step bunching at the grown epilayer surface. We also demonstrated epitaxial growth without step bunching on a 2-inch 4H-SiC Si-face substrate with a vicinal off angle of 0.79o. Ni Schottky barrier diodes fabricated on an as-grown epilayer had a blocking voltage above 1000V and a leakage current of less than 5x10-7A/cm2. We also investigated the propagation of basal plane dislocation from the vicinal off angled substrate into the epitaxial layer.

Abstract: Thick 4H-SiC epitaxial layers have been grown using a combination of two chlorinated precursors silicon tetrachloride (SiCl4) and chloromethane (CH3Cl) at 16000C. Growth rates up to 100 m/hr have been demonstrated. The use of chloro-silane precursor eliminated the problem of homogenous nucleation of Si in the gas phase, which was significant in CH3Cl/SiH4 growth. Much higher values of Si/H2 and C/H2 ratios without morphology degradation were made possible by increasing the growth temperature from 1300 to 1600°C. Results of photoluminescence and high-resolution X-ray diffraction and time-resolved PL were used to evaluate the quality of the epitaxial layers. The crystalline quality and the growth rate achieved so far offer a promise of exceeding the state of the arts results achieved with more traditional hydro-carbon precursors.

Abstract: Chloride-based growth on on-axis SiC substrates has been studied at higher temperature than typical CVD conditions. The use of chlorinated precursors allows to grow homo-polytypic layers and to achieve high growth rates for thick layers deposition. In this study a vertical reactor with the gas flow inlet at the bottom has been used to grow layers up to 1.5 mm thick. Thanks to the addition of hydrogen chloride (HCl) to the standard precursors mixture, growth rates up to 300 μm/h have been achieved at a process temperature lower than 1900 °C. Very pure layers, micropipe free, and with a low background doping have been grown on 4H and 6H-SiC carbon and silicon-face, respectively, on-axis 3” diameter substrates. The results obtained indicates that this process has the potential to become a novel bulk growth technique at lower temperature than usual, which could give several advantages.

Abstract: Chlorinated silicon precursor SiCl4 was investigated as an alternative to SiH4 with HCl addition as a source of additional chlorine in order to suppress the homogeneous nucleation during the low-temperature epitaxial growth at 1300°C. The homogeneous nucleation in the gas phase was further reduced compared to SiH4+HCl growth. The process window for obtaining good epilayer morphology during the CH3Cl/SiCl4 growth was found to correspond to Si supply-limited mode. At lower values of C/Si ratio formation of Si-rich polycrystalline islands/droplets took place. At high C/Si ratio, formation of polycrystalline SiC was the source of morphology degradation. The process window became increasingly narrower at higher Rg, which limited the possibility of significantly increasing Rg at such low growth temperatures. Generation of triangular defects became significant at Rg above 5-6 μm/hr, even when a nearly-optimal value of C/Si ratio was used. Similar experiments were conducted using C3H8, a more traditional precursor, instead of the halo-carbon precursor CH3Cl. While a similar growth rate could be achieved for the same SiCl4 flow rate, much lower values of the C/Si ratio were required. The morphology with C3H8 was worse within the process window. The C/Si process window for the C3H8/SiCl4 growth was much narrower compared to the CH3Cl/SiCl4 growth, and the window essentially disappeared at Rg > 3 4 μm/hr.

Abstract: We developed a production technology for epitaxial growth with a smooth surface morphology for 4º off Si-face 4H-SiC epitaxial layers on 100 mm-diameter substrates. High-contrast topography images by optical surface analyzer revealed that a step bunching free surface was obtained throughout the whole area of the wafer surface. However, short-length steps still remained locally on the epitaxial surfaces. Using photoluminescence imaging, it was clarified that the short-length steps were morphological in nature and did not contain stacking faults. The short-length steps were generated by step-flow growth pinning caused by the shallow pits of threading screw dislocations revealed by molten KOH etching.

Abstract: The epitaxial growth process was optimized in order to obtain good surface morphology for epilayers grown on 4˚ off-axis substrates. The optimization was carried out from growth temperatures and gas chemistry including C/Si ratio. Step-bunching was significantly suppressed by the optimized process and a surface roughness Ra of 0.2 nm was achieved. Etch pit density evaluation by KOH etching indicated that the basal plane dislocations were reduced to less than 50 cm-2 by the use of 4˚ off-axis substrates. Photoluminescence evaluation showed that the epilayer grown by the optimized process had a better crystalline quality than that grown by a standard process. Schottky diodes fabricated on the epilayer by the optimized process represented the ideality factor n of 1.01 and the barrier height of 1.67eV. These results demonstrate that high quality epilayers with smooth surfaces comparable to those on 8˚off-axis substrates were obtained on 4˚off-axis substrates.