Materials Science Forum Vols. 645-648

Abstract: Channel mobility properties of SiC and GaN based MOSFETs and AlGaN/GaN HEMTs are compared in this paper. For a similar active area, the specific on-resistance of the MOSFET is much larger than the on-resistance for the HEMT, which is depending on the electron mobility in their respective channels. Physically-based models are used to fit this experimental transistor mobility.

Abstract: In this paper, the evolution of the electrical behaviour of GaN and AlGaN materials after high-temperature annealing and thermal oxidation is discussed. In particular, annealing above 1100°C, required for electrical activation of implanted species, increases the surface state density, reducing the metal/GaN Schottky barriers and increasing the leakage current. On the other hand, the thermal oxidation at 900°C of AlGaN/GaN heterostructures showed the formation of a thin oxide layer, which can be able to passivate surface defects and/or can serve as inter-device isolation. However, a decrease of the sheet carrier density in the two dimensional electron gas (2DEG) was observed when the material is subjected to such high thermal budgets. The results are discussed considering the possible optimizations and applications to GaN-devices technology.

Abstract: Field-effect transistors were fabricated on GaN and Al0.2Ga0.8N epitaxial layers grown by metal organic chemical vapor deposition (MOCVD) on sapphire substrates. The threshold voltage VTH was higher when AlGaN was used as an active layer. VTH also increased with temperature due to the increased positive polarization charge at the GaN/AlN buffer/sapphire interfaces. Drain current increased at high temperatures even with more positive threshold voltage, which makes GaN-based FET devices attractive for high temperature operation.

Abstract: We present the realization of high electron mobility transistors (HEMTs) based on AlGaN/GaN heterostructures grown on silicon substrates using a SiC transition layer. The growth of AlGaN/GaN heterostructures on Si (111) was performed using metalorganic chemical vapour deposition (MOCVD). The (111) SiC transition layer was realized by low pressure CVD and prevented Ga-induced meltback etching and Si-outdiffusion in the subsequent MOCVD growth. The two-dimensional electron gas (2DEG) formed at the AlGaN/GaN interface showed an electron sheet density of 1.5x1013 cm-3 and a mobility of 870 cm²/Vs proving the high structural quality of the heterostructure. Device processing was done using electron beam lithography. DC and RF characteristics were analysed and showed a peak cut-off frequency as high as 6 GHz for a 1.2 µm gate HEMT.

Abstract: We have fabricated SiO2 passivated AlGaN/GaN HEMTs and employed As+ ion implantation on the passivation layer and optimized the implantation energy. After As+ ion implantation with 120 keV energy and 1 × 1014 /cm2 dose, the maximum drain current, maximum transconductance and the breakdown voltage increased to 419.6 mA/mm, 87.9 mS/mm and 698 V while those of the conventional device was 317.0 mA/mm, 65.1 mS/mm and 639 V, respectively.

Abstract: Diamond is a hopeful candidate for power switching device which can operate at high temperature as a “Cooling system free” device, yet at a high current. Recently we have developed a 3D diamond CVD growth method coupled with a sophisticated “direct wafer fabrication technique” to fabricate diamond wafer without slicing. Currently, half inch size single crystal diamond substrates are available for R&D of diamond device. Using this technique, we have increased the device fabrication size from 3x3mm2 to half inch wafer. In this paper, we present the results of measurements on the first device fabricated on a half inch size CVD substrate. We have carried out the first device characteristics mapping for diamond, and have observed the influence of substrate characteristics on the SBD characteristics.

Abstract: Because of the superior material properties of diamond, high performance in high-temperature power device application is demonstrated in both the computational and the experimental studies. A calculated Baliga limit of diamond Schottky barrier diode (SBD) based on 1D model indicates that an increase in on-resistance is highly expected within the high blocking voltage region and will be remarkable at high temperature conditions. Because of the high barrier height of diamond SBDs, the reverse leakage current is suppressed even at high temperatures. From the high-temperature stability test, stable interfaces of metal/diamond contact with constant Schottky barrier height have been confirmed. The SBD works for more than 1500 hrs at 400oC.

Abstract: Back-gated field effect transistors (FETs) based on catalyst-free grown 3C-SiC nanowires (NWs) were fabricated and electrical characterization is presented. Silvaco simulation was used to fit the I-V characteristics and to extract information about the carrier (electrons) concentration and the oxide/NW interface quality. The high trap density and fixed charges at the nanowire/oxide interface, Dit~5x1011 cm-2eV-1 and Qf ~3x1013cm-2, and the high electron concentration (~3x1019 cm-3) originating from unintentional doping severely affect the electrical conduction through the nanowires which has as a result low values of mobility and transconductance, 0.11 cm2/Vs and 7x10-10 A/V, respectively.

Abstract: Electron paramagnetic resonance (EPR) and electron spin echo (ESE) at X-band (9.4 GHz) and W-band (94 GHz) have been used to study defects in natural diamond nanocrystals, detonation nanodiamond (ND) with a size of  4.5 nm and detonation ND after high-pressure high-temperature (HTHP) sintering with a size of  8.5 nm. Based on identification of atomic nitrogen centers N0 and nitrogen pairs N2+ detected by means of the high frequency EPR and ESE in natural diamond nanocrystals, atomic nitrogen centers N0 have been discovered in nanodiamond core in detonation ND and detonation ND after sintering. In addition EPR signal of multi-vacancy centers with spin 3/2 seems to be observed in diamond core of detonation ND.

Abstract: A physical and electrical analysis of Si/SiC heterojunctions formed by layer transfer based on the smartcut® process is presented in this paper. AFM and SEM have revealed a high bonding quality when Si wafers are transferred to SiC on-axis wafers. XRD points to the fact that the layers are monocrystalline in nature. A surface AFM analysis of the bonded wafers demonstrated a smooth surface (rms = 5.8 nm) suitable for semiconductor device fabrication. Capacitors have been fabricated from the Si/SiC heterojunctions, which have been totally oxidised. Oxidised Si/SiC structures yielded a lower density of interface states than conventional thermal oxidation techniques.