Materials Science Forum Vols. 645-648

Abstract: We present photoconductivity experiments on a 4H-SiC diode and on 4H-SiC high purity semi-insulating (HPSI) substrate. These devices have been tested over a wide optical wavelength range: 355 nm to 820 nm. The penetration depth of optical wavelength has been estimated from spectrophotometer measurements. Photoconductivity regime has been studied at low electrical field for both devices and photoconductivity efficiency has been compared to Si switches.

Abstract: The effect of electron irradiation on the charge collection efficiency of a 6H-SiC p+n diode has been studied. The diodes were irradiated with electrons of energies from 100 keV to 1 MeV. The charge collection efficiencies of the samples were measured for alpha particles before and after the electron irradiation. The electron irradiation at 100 keV does not affect the charge collection efficiency, while the electron irradiation at 200 keV or higher decreases the charge collection efficiency. The degree of the degradation of the diodes correlates with the energy of the electron irradiation.

Abstract: In this work, the benefits of the low-temperature halo-carbon epitaxial growth at 1300oC to form anodes of 4H-SiC PiN diodes were investigated. Regular-temperature epitaxial growth was used to form an 8.6 μm-thick n-type drift region with net donor concentration of 6.45x1015 cm-3. Trimethylaluminum doping, in situ during blanket low-temperature halo-carbon epitaxial growth, was used to form heavily doped p-type layers. Forward I-V characteristics measured from diodes having different anode areas indicated that the new epitaxial growth technique provides anodes with low values of the series resistance, even without contact annealing. At room temperature, a 100 μm-diameter diode had a forward voltage of 3.75 V at 1000A/cm² before annealing and 3.23 V after annealing for 2 min at 750°C. The reverse breakdown voltage was more than 680 V (on average) in the devices without edge termination or surface passivation.

Abstract: A recessed implanted-gate short-channel 1290-V normally-OFF 4H-SiC vertical-channel JFET (VJFET), fabricated in seven photolithographic-levels, with a single masked ion-implantation and no epitaxial regrowth, is evaluated for efficient power conditioning. Under unipolar high-current-gain operation, which is required for efficient power switching, the 1200-V N-OFF (enhancement mode) VJFET exhibits prohibitively high on-state resistance. Comparison with 1200-V normally-ON VJFETs, fabricated on the same wafer, confirms experimentally that the strong gate-depletion-region overlap required for 1200-V normally-OFF blocking is the principal contributor to the prohibitively high specific on-state resistance observed under high current-gain VJFET operation. Recessed-implanted-gate VJFET channel-region optimization simulations (assuming a single commercial implantation and no epitaxial-regrowth) revealed that although aggressively increasing channel doping lowers resistance, the corresponding reduction in source mesa-width can prohibitively limit manufacturability.

Abstract: Since SiC VJFETs are believed to offer extremely fast turn on and turn off processes it is important to understand how these transients are tailored by the layout. Regarding the basic layouts two main topologies are under investigation today – structures with the well known SIT layout with purely vertical current flow and lateral vertical concepts where the current flow through the channel is in lateral direction and the vertical current flow takes place in the drift region only. In this paper we will focus on differences in the electric characteristics of both structures and the relation of the dynamic behavior to the topology and the layout of the switches. For the analysis, 1200V VJFETs based on the two basic topologies were manufactured having approximately the same total and active device area. It turns out that the SIT switches under investigation suffer from a high internal gate resistance in the p-doped layers and a relatively high gate drain capacitance.

Abstract: Recently 63 m, 100 m, and 125 m 1200 V normally-off SiC VJFETs have become commercially available and 99% efficiency has been demonstrated in a single-phase solar inverter using these components [1]. They exhibit low specific on-resistance (3 m∙cm2), high saturation current density (1000 A∙cm-2), and low switching losses. For some applications, including 30 to 100 kW inverter modules and those requiring high surge current capability, larger die size is required. This paper reports the static and dynamic performance of 15 mm2 1200 V normally-off VJFETs with 25 m on-resistance and 120 A saturation current at 25 °C.

Abstract: In this study, we evaluated the radiation hardness of SiC Buried Gate Static Induction Transistors (SiC-BGSITs) and Si-based switching devices up to the absorbed dose of 10 MGy(SiO2). The on-voltage Von of Si-IGBT degraded excessively at the early stage of the irradiation (>~0.1 MGy(SiO2)) due to the bulk damage produced by Compton electrons like the gain degradation in Si bipolar transistors. The threshold voltage Vth of Si-MOSFET was very sensitive against the radiation due to the competing mechanism between the generation of the hole traps in the gate SiO2 and the SiO2/Si interface states. Moreover, the breakdown voltage VBR and leak current Ileak of MOSFET degraded significantly against the absorbed dose. While, the electrical properties of SiC-BGSIT was very stable even after the irradiation of 10 MGy(SiO2).

Abstract: The two-dimensional device simulator, MediciTM, was used to simulate 4H silicon carbide (4H-SiC) n-channel power metal semiconductor field effect transistors (MESFETs) with 0.5 µm gate length with and without p-type buffer layer between the n-channel and the semi-insulating (SI) substrate. The devices, which have previously been fabricated and characterized experimentally, have ion-implanted n+ source and drain ohmic contact regions. The simulations were performed with transient 30 V amplitude symmetrical triangular pulse with 30 s pulse width. Simulations show that hysteresis in drain I-V curves of MESFETs is due to substrate traps and source/drain implant damage traps. The hysteresis is caused by trapping and emission of channel electrons by the traps as VDS rises from 0 V to VDS(max) and as VDS falls from VDS(max) back to 0 V. This leads to difference in trap occupation, and hence difference in channel electron concentration as VDS rises and falls. This finally leads to difference in drain-source current (IDS) at a given VDS for a given VGS as VDS rises and falls, giving rise to the hysteresis in the I-V curves.

Abstract: In order to facilitate the circuit design and simulation at extreme temperatures, APEI, Inc. fully characterized a custom-built SiC VJFET transistor at temperatures up to 525 °C and built a Spice model based on the characterization data. The temperature effects were also formulized in this Spice model to ensure its uniform applicability over the entire temperature range. Test circuits of a differential amplifier and a multivibrator were built and tested from room temperature up to 450 °C to validate the proposed SiC JFET model, which could be widely applied in Spice based circuit simulation packages.

Abstract: This work presents the amplitude modulation radio transmission system for communications in hostile environments. The commissioning of a high temperature oscillator and AM mixer system for the purpose of Amplitude Shift Keyed modulation is presented. While previous work has demonstrated oscillators in the Ultra High Frequency (UHF) band, these have been targeted at applications such as radar and mobile telephones. In this paper we have concentrated on the shortwave bands to maximize the range between a sensor unit and the receiver within wireless networks. The work demonstrates that simple communication systems are already possible for hostile environments and allow for simple sensor data to be wirelessly transmitted to safer working areas.